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yaml --- r: 275223 b: refs/heads/master c: b8c6e0f h: refs/heads/master i: 275221: de1fa44 275219: 8a791bb 275215: 7d8c8e5 v: v3
git-mirror · Aug 29, 2011 · 9b54325 · 9b54325
1 parent ebb50ee
commit 9b54325
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Showing 2 changed files with 4 additions and 4 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2d43f5d667273ba4975cb79782a46aa374dd8607
+refs/heads/master: b8c6e0fe46fcd60f58089365dd96dcf04f95263b
diff --git a/trunk/Documentation/DocBook/drm.tmpl b/trunk/Documentation/DocBook/drm.tmpl
@@ -724,11 +724,11 @@ void intel_crt_init(struct drm_device *dev)
 	has finished rendering to the object, then the object must be made
 	coherent with the CPU's view
 	of memory, usually involving GPU cache flushing of various kinds.
-	This core CPU&lt;-&gt;GPU coherency management is provided by the GEM
-	set domain function, which evaluates an object's current domain and
+	This core CPU&lt;-&gt;GPU coherency management is provided by a
+	device-specific ioctl, which evaluates an object's current domain and
 	performs any necessary flushing or synchronization to put the object
 	into the desired coherency domain (note that the object may be busy,
-	i.e. an active render target; in that case, the set domain function
+	i.e. an active render target; in that case, setting the domain
 	blocks the client and waits for rendering to complete before
 	performing any necessary flushing operations).
       </para>