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r: 127758
b: refs/heads/master
c: e1c4a2d
h: refs/heads/master
v: v3
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Ian Molton committed Dec 31, 2008
1 parent bd3c067 commit 9bdf8a4
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 613e09b46a86d454fb53f7e9eac5e240f1e3bacf
refs/heads/master: e1c4a2d7b381f8f6212888a15a69f8fce8d0a08f
8 changes: 5 additions & 3 deletions trunk/Documentation/DMA-API.txt
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Expand Up @@ -316,10 +316,12 @@ reduce current DMA mapping usage or delay and try again later).
pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
int nents, int direction)

Maps a scatter gather list from the block layer.

Returns: the number of physical segments mapped (this may be shorter
than <nents> passed in if some elements of the scatter/gather list are
physically or virtually adjacent and an IOMMU maps them with a single
entry).
than <nents> passed in if the block layer determines that some
elements of the scatter/gather list are physically adjacent and thus
may be mapped with a single entry).

Please note that the sg cannot be mapped again if it has been mapped once.
The mapping process is allowed to destroy information in the sg.
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2 changes: 1 addition & 1 deletion trunk/Documentation/arm/mem_alignment
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Expand Up @@ -24,7 +24,7 @@ real bad - it changes the behaviour of all unaligned instructions in user
space, and might cause programs to fail unexpectedly.

To change the alignment trap behavior, simply echo a number into
/proc/cpu/alignment. The number is made up from various bits:
/proc/sys/debug/alignment. The number is made up from various bits:

bit behavior when set
--- -----------------
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286 changes: 0 additions & 286 deletions trunk/Documentation/arm/pxa/mfp.txt

This file was deleted.

12 changes: 0 additions & 12 deletions trunk/Documentation/cpu-freq/user-guide.txt
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Expand Up @@ -23,7 +23,6 @@ Contents:
1.3 sparc64
1.4 ppc
1.5 SuperH
1.6 Blackfin

2. "Policy" / "Governor"?
2.1 Policy
Expand Down Expand Up @@ -98,17 +97,6 @@ The following SuperH processors are supported by cpufreq:
SH-3
SH-4

1.6 Blackfin
------------

The following Blackfin processors are supported by cpufreq:

BF522, BF523, BF524, BF525, BF526, BF527, Rev 0.1 or higher
BF531, BF532, BF533, Rev 0.3 or higher
BF534, BF536, BF537, Rev 0.2 or higher
BF561, Rev 0.3 or higher
BF542, BF544, BF547, BF548, BF549, Rev 0.1 or higher


2. "Policy" / "Governor" ?
==========================
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