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yaml
---
r: 48270
b: refs/heads/master
c: 49afdeb
h: refs/heads/master
v: v3
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Michael Chan authored and David S. Miller committed Feb 13, 2007
1 parent 519cdf6 commit 9c90a9e
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Showing 2 changed files with 8 additions and 2 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 436f137975507b0baab0859a253c3c9332c22f62
refs/heads/master: 49afdeb65bb917e22cf9116bc31380befe9db890
8 changes: 7 additions & 1 deletion trunk/drivers/net/tg3.c
Original file line number Diff line number Diff line change
Expand Up @@ -11314,6 +11314,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f);
u32 read_water = 0x7;

/* If the 5704 is behind the EPB bridge, we can
* do the less restrictive ONE_DMA workaround for
Expand All @@ -11325,8 +11326,13 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
else if (ccval == 0x6 || ccval == 0x7)
tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;

if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703)
read_water = 4;
/* Set bit 23 to enable PCIX hw bug fix */
tp->dma_rwctrl |= 0x009f0000;
tp->dma_rwctrl |=
(read_water << DMA_RWCTRL_READ_WATER_SHIFT) |
(0x3 << DMA_RWCTRL_WRITE_WATER_SHIFT) |
(1 << 23);
} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
/* 5780 always in PCIX mode */
tp->dma_rwctrl |= 0x00144000;
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