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yaml
---
r: 344323
b: refs/heads/master
c: 92ece1c
h: refs/heads/master
i:
  344321: 37920ce
  344319: 06c8c6d
v: v3
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Thomas Petazzoni committed Nov 14, 2012
1 parent f3110c0 commit 9cacef5
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Showing 257 changed files with 1,360 additions and 8,990 deletions.
2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 4e76b1b2329b4a19adfacd187bc2920f68126a95
refs/heads/master: 92ece1cdd27eee32c53630dc6af6d031b55be199
4 changes: 0 additions & 4 deletions trunk/Documentation/cgroups/memory.txt
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Expand Up @@ -466,10 +466,6 @@ Note:
5.3 swappiness

Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only.
Please note that unlike the global swappiness, memcg knob set to 0
really prevents from any swapping even if there is a swap storage
available. This might lead to memcg OOM killer if there are no file
pages to reclaim.

Following cgroups' swappiness can't be changed.
- root cgroup (uses /proc/sys/vm/swappiness).
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Expand Up @@ -6,15 +6,9 @@ Required properties:
- interrupt-controller: Identifies the node as an interrupt controller.
- #interrupt-cells: The number of cells to define the interrupts. Should be 1.
The cell is the IRQ number

- reg: Should contain PMIC registers location and length. First pair
for the main interrupt registers, second pair for the per-CPU
interrupt registers. For this last pair, to be compliant with SMP
support, the "virtual" must be use (For the record, these registers
automatically map to the interrupt controller registers of the
current CPU)


interrupt registers

Example:

Expand All @@ -24,6 +18,6 @@ Example:
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
reg = <0xd0020a00 0x1d0>,
<0xd0021070 0x58>;
reg = <0xd0020000 0x1000>,
<0xd0021000 0x1000>;
};
20 changes: 0 additions & 20 deletions trunk/Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt

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Expand Up @@ -5,7 +5,6 @@ Required properties:
- compatible: Should be "marvell,armada-370-xp-timer"
- interrupts: Should contain the list of Global Timer interrupts
- reg: Should contain the base address of the Global Timer registers
- clocks: clock driving the timer hardware

Optional properties:
- marvell,timer-25Mhz: Tells whether the Global timer supports the 25
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21 changes: 0 additions & 21 deletions trunk/Documentation/devicetree/bindings/arm/coherency-fabric.txt

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47 changes: 0 additions & 47 deletions trunk/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt

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21 changes: 0 additions & 21 deletions trunk/Documentation/devicetree/bindings/clock/mvebu-cpu-clock.txt

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119 changes: 0 additions & 119 deletions trunk/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt

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40 changes: 0 additions & 40 deletions trunk/Documentation/devicetree/bindings/dma/mv-xor.txt

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35 changes: 0 additions & 35 deletions trunk/Documentation/devicetree/bindings/net/marvell-orion-mdio.txt

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