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clk: armada-370-xp: add support for clock framework
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
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Gregory CLEMENT authored and Thomas Petazzoni committed Nov 20, 2012
1 parent c4c34d6 commit 9d20278
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Showing 7 changed files with 112 additions and 1 deletion.
15 changes: 15 additions & 0 deletions arch/arm/boot/dts/armada-370.dtsi
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Expand Up @@ -75,5 +75,20 @@
#interrupts-cells = <2>;
interrupts = <91>;
};

coreclk: mvebu-sar@d0018230 {
compatible = "marvell,armada-370-core-clock";
reg = <0xd0018230 0x08>;
#clock-cells = <1>;
};

gateclk: clock-gating-control@d0018220 {
compatible = "marvell,armada-370-gating-clock";
reg = <0xd0018220 0x4>;
clocks = <&coreclk 0>;
#clock-cells = <1>;
};


};
};
12 changes: 12 additions & 0 deletions arch/arm/boot/dts/armada-xp-mv78230.dtsi
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Expand Up @@ -24,6 +24,18 @@
gpio1 = &gpio1;
};

cpus {
#address-cells = <1>;
#size-cells = <0>;

cpu@0 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
};
}

soc {
pinctrl {
compatible = "marvell,mv78230-pinctrl";
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19 changes: 19 additions & 0 deletions arch/arm/boot/dts/armada-xp-mv78260.dtsi
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Expand Up @@ -25,6 +25,25 @@
gpio2 = &gpio2;
};

cpus {
#address-cells = <1>;
#size-cells = <0>;

cpu@0 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
};

cpu@1 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
};
};

soc {
pinctrl {
compatible = "marvell,mv78260-pinctrl";
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34 changes: 34 additions & 0 deletions arch/arm/boot/dts/armada-xp-mv78460.dtsi
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Expand Up @@ -25,6 +25,40 @@
gpio2 = &gpio2;
};


cpus {
#address-cells = <1>;
#size-cells = <0>;

cpu@0 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
};

cpu@1 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
};

cpu@2 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <2>;
clocks = <&cpuclk 2>;
};

cpu@3 {
device_type = "cpu";
compatible = "marvell,sheeva-v7";
reg = <3>;
clocks = <&cpuclk 3>;
};
};

soc {
pinctrl {
compatible = "marvell,mv78460-pinctrl";
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20 changes: 20 additions & 0 deletions arch/arm/boot/dts/armada-xp.dtsi
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Expand Up @@ -47,6 +47,26 @@
marvell,timer-25Mhz;
};

coreclk: mvebu-sar@d0018230 {
compatible = "marvell,armada-xp-core-clock";
reg = <0xd0018230 0x08>;
#clock-cells = <1>;
};

cpuclk: clock-complex@d0018700 {
#clock-cells = <1>;
compatible = "marvell,armada-xp-cpu-clock";
reg = <0xd0018700 0xA0>;
clocks = <&coreclk 1>;
};

gateclk: clock-gating-control@d0018220 {
compatible = "marvell,armada-xp-gating-clock";
reg = <0xd0018220 0x4>;
clocks = <&coreclk 0>;
#clock-cells = <1>;
};

system-controller@d0018200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0xd0018200 0x500>;
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4 changes: 4 additions & 0 deletions arch/arm/mach-mvebu/Kconfig
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Expand Up @@ -9,6 +9,10 @@ config ARCH_MVEBU
select PINCTRL
select PLAT_ORION
select SPARSE_IRQ
select CLKDEV_LOOKUP
select MVEBU_CLK_CORE
select MVEBU_CLK_CPU
select MVEBU_CLK_GATING

if ARCH_MVEBU

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9 changes: 8 additions & 1 deletion arch/arm/mach-mvebu/armada-370-xp.c
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Expand Up @@ -17,6 +17,7 @@
#include <linux/of_platform.h>
#include <linux/io.h>
#include <linux/time-armada-370-xp.h>
#include <linux/clk/mvebu.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
Expand All @@ -37,8 +38,14 @@ void __init armada_370_xp_map_io(void)
iotable_init(armada_370_xp_io_desc, ARRAY_SIZE(armada_370_xp_io_desc));
}

void __init armada_370_xp_timer_and_clk_init(void)
{
mvebu_clocks_init();
armada_370_xp_timer_init();
}

struct sys_timer armada_370_xp_timer = {
.init = armada_370_xp_timer_init,
.init = armada_370_xp_timer_and_clk_init,
};

static void __init armada_370_xp_dt_init(void)
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