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yaml
---
r: 154856
b: refs/heads/master
c: 9306c8d
h: refs/heads/master
v: v3
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Tim Anderson authored and Ralf Baechle committed Jul 3, 2009
1 parent 0c74905 commit 9d3a0f2
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Showing 3 changed files with 9 additions and 12 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: b53d4d1f8d522342e66f79b8b49a19835071fed4
refs/heads/master: 9306c8def6abc2dbde4ac75eb6c631606b8fc1dd
4 changes: 4 additions & 0 deletions trunk/arch/mips/include/asm/gic.h
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,11 @@
#define GIC_TRIG_EDGE 1
#define GIC_TRIG_LEVEL 0

#if CONFIG_SMP
#define GIC_NUM_INTRS (24 + NR_CPUS * 2)
#else
#define GIC_NUM_INTRS 32
#endif

#define MSK(n) ((1 << (n)) - 1)
#define REG32(addr) (*(volatile unsigned int *) (addr))
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15 changes: 4 additions & 11 deletions trunk/arch/mips/kernel/irq-gic.c
Original file line number Diff line number Diff line change
Expand Up @@ -107,9 +107,7 @@ static unsigned int gic_irq_startup(unsigned int irq)
{
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
irq -= _irqbase;
/* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))),
1 << (irq % 32));
GIC_SET_INTR_MASK(irq, 1);
return 0;
}

Expand All @@ -120,8 +118,7 @@ static void gic_irq_ack(unsigned int irq)
#endif
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
irq -= _irqbase;
GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))),
1 << (irq % 32));
GIC_CLR_INTR_MASK(irq, 1);

if (_intrmap[irq].trigtype == GIC_TRIG_EDGE) {
if (!gic_wedgeb2bok)
Expand All @@ -138,18 +135,14 @@ static void gic_mask_irq(unsigned int irq)
{
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
irq -= _irqbase;
/* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))),
1 << (irq % 32));
GIC_CLR_INTR_MASK(irq, 1);
}

static void gic_unmask_irq(unsigned int irq)
{
pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
irq -= _irqbase;
/* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */
GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))),
1 << (irq % 32));
GIC_SET_INTR_MASK(irq, 1);
}

#ifdef CONFIG_SMP
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