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DT: MIPS: ralink: add MT7620A dts files
Add a dtsi file for MT7620A SoC and a sample dts file. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: http://patchwork.linux-mips.org/patch/5190/
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John Crispin
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Ralf Baechle
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May 7, 2013
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@@ -1,3 +1,4 @@ | ||
obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o | ||
obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o | ||
obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o | ||
obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o |
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@@ -0,0 +1,58 @@ | ||
/ { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "ralink,mtk7620a-soc"; | ||
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cpus { | ||
cpu@0 { | ||
compatible = "mips,mips24KEc"; | ||
}; | ||
}; | ||
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cpuintc: cpuintc@0 { | ||
#address-cells = <0>; | ||
#interrupt-cells = <1>; | ||
interrupt-controller; | ||
compatible = "mti,cpu-interrupt-controller"; | ||
}; | ||
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palmbus@10000000 { | ||
compatible = "palmbus"; | ||
reg = <0x10000000 0x200000>; | ||
ranges = <0x0 0x10000000 0x1FFFFF>; | ||
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#address-cells = <1>; | ||
#size-cells = <1>; | ||
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sysc@0 { | ||
compatible = "ralink,mt7620a-sysc"; | ||
reg = <0x0 0x100>; | ||
}; | ||
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intc: intc@200 { | ||
compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc"; | ||
reg = <0x200 0x100>; | ||
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interrupt-controller; | ||
#interrupt-cells = <1>; | ||
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interrupt-parent = <&cpuintc>; | ||
interrupts = <2>; | ||
}; | ||
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memc@300 { | ||
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; | ||
reg = <0x300 0x100>; | ||
}; | ||
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uartlite@c00 { | ||
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; | ||
reg = <0xc00 0x100>; | ||
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interrupt-parent = <&intc>; | ||
interrupts = <12>; | ||
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reg-shift = <2>; | ||
}; | ||
}; | ||
}; |
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@@ -0,0 +1,16 @@ | ||
/dts-v1/; | ||
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/include/ "mt7620a.dtsi" | ||
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/ { | ||
compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; | ||
model = "Ralink MT7620A evaluation board"; | ||
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memory@0 { | ||
reg = <0x0 0x2000000>; | ||
}; | ||
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chosen { | ||
bootargs = "console=ttyS0,57600"; | ||
}; | ||
}; |