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yaml
---
r: 230521
b: refs/heads/master
c: 54b3846
h: refs/heads/master
i:
  230519: 160b3dc
v: v3
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Simon Horman authored and Paul Mundt committed Dec 8, 2010
1 parent a77503d commit 9dcfa2f
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Showing 3 changed files with 15 additions and 25 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 9f843706bb87837b823228467f4f83973fd110e9
refs/heads/master: 54b384634f7083bcacf9a9ed2e6f4c3d0a246e49
4 changes: 3 additions & 1 deletion trunk/arch/sh/boot/romimage/mmcif-sh7724.c
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,9 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
mmcif_update_progress(MMCIF_PROGRESS_LOAD);

/* load kernel via MMCIF interface */
sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes);
sh_mmcif_boot_do_read(MMCIF_BASE, 512,
(no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
buf);

/* disable clock to the MMCIF hardware block */
__raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
Expand Down
34 changes: 11 additions & 23 deletions trunk/include/linux/mmc/sh_mmcif.h
Original file line number Diff line number Diff line change
Expand Up @@ -162,6 +162,17 @@ static inline int sh_mmcif_boot_do_read(void __iomem *base,
unsigned long k;
int ret = 0;

/* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);

/* CMD9 - Get CSD */
sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);

/* CMD7 - Select the card */
sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);

/* CMD16 - Set the block size */
sh_mmcif_boot_cmd(base, 0x10400000, SH_MMCIF_BBS);

Expand Down Expand Up @@ -205,27 +216,4 @@ static inline void sh_mmcif_boot_init(void __iomem *base)
sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000);
}

static inline void sh_mmcif_boot_slurp(void __iomem *base,
unsigned char *buf,
unsigned long no_bytes)
{
unsigned long tmp;

/* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL,
CLK_ENABLE | CLKDIV_4 | SRSPTO_256 |
SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);

/* CMD9 - Get CSD */
sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);

/* CMD7 - Select the card */
sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);

tmp = no_bytes / SH_MMCIF_BBS;
tmp += (no_bytes % SH_MMCIF_BBS) ? 1 : 0;

sh_mmcif_boot_do_read(base, 512, tmp, buf);
}

#endif /* __SH_MMCIF_H__ */

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