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Merge tag 'fbdev-3.17' of git://git.kernel.org/pub/scm/linux/kernel/g…
…it/tomba/linux Pull fbdev updates from Tomi Valkeinen: - much better HDMI infoframe support for OMAP - Cirrus Logic CLPS711X framebuffer driver - DT support for PL11x CLCD driver - various small fixes * tag 'fbdev-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (35 commits) OMAPDSS: DSI: fix depopulating dsi peripherals video: hyperv: hyperv_fb: refresh the VM screen by force on VM panic video: ARM CLCD: Fix DT-related build problems drivers: video: fbdev: atmel_lcdfb.c: Add ability to inverted backlight PWM. video: ARM CLCD: Add DT support drm/omap: Add infoframe & dvi/hdmi mode support OMAPDSS: HDMI: remove the unused code OMAPDSS: HDMI5: add support to set infoframe & HDMI mode OMAPDSS: HDMI4: add support to set infoframe & HDMI mode OMAPDSS: HDMI: add infoframe and hdmi_dvi_mode fields OMAPDSS: add hdmi ops to hdmi-connector and tpd12s015 OMAPDSS: add hdmi ops to hdmi_ops and omap_dss_driver OMAPDSS: HDMI: remove custom avi infoframe OMAPDSS: HDMI5: use common AVI infoframe support OMAPDSS: HDMI4: use common AVI infoframe support OMAPDSS: Kconfig: select HDMI OMAPDSS: HDMI: fix name conflict OMAPDSS: DISPC: clean up dispc_mgr_timings_ok OMAPDSS: DISPC: reject interlace for lcd out OMAPDSS: DISPC: fix debugfs reg dump ...
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* ARM PrimeCell Color LCD Controller PL110/PL111 | ||
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See also Documentation/devicetree/bindings/arm/primecell.txt | ||
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Required properties: | ||
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- compatible: must be one of: | ||
"arm,pl110", "arm,primecell" | ||
"arm,pl111", "arm,primecell" | ||
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- reg: base address and size of the control registers block | ||
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- interrupt-names: either the single entry "combined" representing a | ||
combined interrupt output (CLCDINTR), or the four entries | ||
"mbe", "vcomp", "lnbu", "fuf" representing the individual | ||
CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts | ||
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- interrupts: contains an interrupt specifier for each entry in | ||
interrupt-names | ||
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- clock-names: should contain "clcdclk" and "apb_pclk" | ||
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- clocks: contains phandle and clock specifier pairs for the entries | ||
in the clock-names property. See | ||
Documentation/devicetree/binding/clock/clock-bindings.txt | ||
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Optional properties: | ||
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- memory-region: phandle to a node describing memory (see | ||
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) | ||
to be used for the framebuffer; if not present, the framebuffer | ||
may be located anywhere in the memory | ||
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- max-memory-bandwidth: maximum bandwidth in bytes per second that the | ||
cell's memory interface can handle; if not present, the memory | ||
interface is fast enough to handle all possible video modes | ||
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Required sub-nodes: | ||
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- port: describes LCD panel signals, following the common binding | ||
for video transmitter interfaces; see | ||
Documentation/devicetree/bindings/media/video-interfaces.txt; | ||
when it is a TFT panel, the port's endpoint must define the | ||
following property: | ||
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- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values, | ||
defining the way CLD pads are wired up; first value | ||
contains index of the "CLD" external pin (pad) used | ||
as R0 (first bit of the red component), second value | ||
index of the pad used as G0, third value index of the | ||
pad used as B0, see also "LCD panel signal multiplexing | ||
details" paragraphs in the PL110/PL111 Technical | ||
Reference Manuals; this implicitly defines available | ||
color modes, for example: | ||
- PL111 TFT 4:4:4 panel: | ||
arm,pl11x,tft-r0g0b0-pads = <4 15 20>; | ||
- PL110 TFT (1:)5:5:5 panel: | ||
arm,pl11x,tft-r0g0b0-pads = <1 7 13>; | ||
- PL111 TFT (1:)5:5:5 panel: | ||
arm,pl11x,tft-r0g0b0-pads = <3 11 19>; | ||
- PL111 TFT 5:6:5 panel: | ||
arm,pl11x,tft-r0g0b0-pads = <3 10 19>; | ||
- PL110 and PL111 TFT 8:8:8 panel: | ||
arm,pl11x,tft-r0g0b0-pads = <0 8 16>; | ||
- PL110 and PL111 TFT 8:8:8 panel, R & B components swapped: | ||
arm,pl11x,tft-r0g0b0-pads = <16 8 0>; | ||
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Example: | ||
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clcd@10020000 { | ||
compatible = "arm,pl111", "arm,primecell"; | ||
reg = <0x10020000 0x1000>; | ||
interrupt-names = "combined"; | ||
interrupts = <0 44 4>; | ||
clocks = <&oscclk1>, <&oscclk2>; | ||
clock-names = "clcdclk", "apb_pclk"; | ||
max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */ | ||
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port { | ||
clcd_pads: endpoint { | ||
remote-endpoint = <&clcd_panel>; | ||
arm,pl11x,tft-r0g0b0-pads = <0 8 16>; | ||
}; | ||
}; | ||
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}; | ||
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panel { | ||
compatible = "panel-dpi"; | ||
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port { | ||
clcd_panel: endpoint { | ||
remote-endpoint = <&clcd_pads>; | ||
}; | ||
}; | ||
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panel-timing { | ||
clock-frequency = <25175000>; | ||
hactive = <640>; | ||
hback-porch = <40>; | ||
hfront-porch = <24>; | ||
hsync-len = <96>; | ||
vactive = <480>; | ||
vback-porch = <32>; | ||
vfront-porch = <11>; | ||
vsync-len = <2>; | ||
}; | ||
}; |
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47
Documentation/devicetree/bindings/video/cirrus,clps711x-fb.txt
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* Currus Logic CLPS711X Framebuffer | ||
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Required properties: | ||
- compatible: Shall contain "cirrus,clps711x-fb". | ||
- reg : Physical base address and length of the controller's registers + | ||
location and size of the framebuffer memory. | ||
- clocks : phandle + clock specifier pair of the FB reference clock. | ||
- display : phandle to a display node as described in | ||
Documentation/devicetree/bindings/video/display-timing.txt. | ||
Additionally, the display node has to define properties: | ||
- bits-per-pixel: Bits per pixel. | ||
- ac-prescale : LCD AC bias frequency. This frequency is the required | ||
AC bias frequency for a given manufacturer's LCD plate. | ||
- cmap-invert : Invert the color levels (Optional). | ||
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Optional properties: | ||
- lcd-supply: Regulator for LCD supply voltage. | ||
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Example: | ||
fb: fb@800002c0 { | ||
compatible = "cirrus,ep7312-fb", "cirrus,clps711x-fb"; | ||
reg = <0x800002c0 0xd44>, <0x60000000 0xc000>; | ||
clocks = <&clks 2>; | ||
lcd-supply = <®5v0>; | ||
display = <&display>; | ||
}; | ||
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display: display { | ||
model = "320x240x4"; | ||
native-mode = <&timing0>; | ||
bits-per-pixel = <4>; | ||
ac-prescale = <17>; | ||
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display-timings { | ||
timing0: 320x240 { | ||
hactive = <320>; | ||
hback-porch = <0>; | ||
hfront-porch = <0>; | ||
hsync-len = <0>; | ||
vactive = <240>; | ||
vback-porch = <0>; | ||
vfront-porch = <0>; | ||
vsync-len = <0>; | ||
clock-frequency = <6500000>; | ||
}; | ||
}; | ||
}; |
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