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gpio/omap: use level/edge detect reg offsets
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By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now remove
lot of revision checks in these functions.

Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Tarun Kanti DebBarma committed Feb 6, 2012
1 parent 6ed87c5 commit 9ea14d8
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Showing 3 changed files with 44 additions and 82 deletions.
8 changes: 8 additions & 0 deletions arch/arm/mach-omap2/gpio.c
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Original file line number Diff line number Diff line change
Expand Up @@ -90,6 +90,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN;
pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
break;
case 2:
pdata->bank_type = METHOD_GPIO_44XX;
Expand All @@ -108,6 +112,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0;
pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
break;
default:
WARN(1, "Invalid gpio bank_type\n");
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4 changes: 4 additions & 0 deletions arch/arm/plat-omap/include/plat/gpio.h
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Original file line number Diff line number Diff line change
Expand Up @@ -190,6 +190,10 @@ struct omap_gpio_reg_offs {
u16 debounce_en;
u16 ctrl;
u16 wkup_en;
u16 leveldetect0;
u16 leveldetect1;
u16 risingdetect;
u16 fallingdetect;

bool irqenable_inv;
};
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114 changes: 32 additions & 82 deletions drivers/gpio/gpio-omap.c
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Original file line number Diff line number Diff line change
Expand Up @@ -257,15 +257,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
bank->enabled_non_wakeup_gpios &= ~gpio_bit;
}

if (cpu_is_omap44xx()) {
bank->level_mask =
__raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
__raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
} else {
bank->level_mask =
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
__raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
}
bank->level_mask =
__raw_readl(bank->base + bank->regs->leveldetect0) |
__raw_readl(bank->base + bank->regs->leveldetect1);
}
#endif

Expand Down Expand Up @@ -405,12 +399,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
if (type & ~IRQ_TYPE_SENSE_MASK)
return -EINVAL;

/* OMAP1 allows only only edge triggering */
if (!cpu_class_is_omap2()
&& (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
bank = irq_data_get_irq_chip_data(d);

if (!bank->regs->leveldetect0 &&
(type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
return -EINVAL;

bank = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(&bank->lock, flags);
retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(&bank->lock, flags);
Expand Down Expand Up @@ -658,9 +652,8 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
isr &= 0x0000ffff;

if (cpu_class_is_omap2()) {
if (bank->level_mask)
level_mask = bank->level_mask & enabled;
}

/* clear edge sensitive interrupts before handler(s) are
called so that we don't miss any interrupt occurred while
Expand Down Expand Up @@ -1271,40 +1264,18 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!(bank->enabled_non_wakeup_gpios))
goto save_gpio_context;

if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
bank->saved_datain = __raw_readl(bank->base +
OMAP24XX_GPIO_DATAIN);
l1 = __raw_readl(bank->base +
OMAP24XX_GPIO_FALLINGDETECT);
l2 = __raw_readl(bank->base +
OMAP24XX_GPIO_RISINGDETECT);
}

if (cpu_is_omap44xx()) {
bank->saved_datain = __raw_readl(bank->base +
OMAP4_GPIO_DATAIN);
l1 = __raw_readl(bank->base +
OMAP4_GPIO_FALLINGDETECT);
l2 = __raw_readl(bank->base +
OMAP4_GPIO_RISINGDETECT);
}
bank->saved_datain = __raw_readl(bank->base +
bank->regs->datain);
l1 = __raw_readl(bank->base + bank->regs->fallingdetect);
l2 = __raw_readl(bank->base + bank->regs->risingdetect);

bank->saved_fallingdetect = l1;
bank->saved_risingdetect = l2;
l1 &= ~bank->enabled_non_wakeup_gpios;
l2 &= ~bank->enabled_non_wakeup_gpios;

if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
__raw_writel(l1, bank->base +
OMAP24XX_GPIO_FALLINGDETECT);
__raw_writel(l2, bank->base +
OMAP24XX_GPIO_RISINGDETECT);
}

if (cpu_is_omap44xx()) {
__raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
__raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
}
__raw_writel(l1, bank->base + bank->regs->fallingdetect);
__raw_writel(l2, bank->base + bank->regs->risingdetect);

save_gpio_context:
if (bank->get_context_loss_count)
Expand Down Expand Up @@ -1341,21 +1312,11 @@ void omap2_gpio_resume_after_idle(void)
if (!(bank->enabled_non_wakeup_gpios))
continue;

if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
__raw_writel(bank->saved_fallingdetect,
bank->base + OMAP24XX_GPIO_FALLINGDETECT);
__raw_writel(bank->saved_risingdetect,
bank->base + OMAP24XX_GPIO_RISINGDETECT);
l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
}

if (cpu_is_omap44xx()) {
__raw_writel(bank->saved_fallingdetect,
bank->base + OMAP4_GPIO_FALLINGDETECT);
__raw_writel(bank->saved_risingdetect,
bank->base + OMAP4_GPIO_RISINGDETECT);
l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
}
__raw_writel(bank->saved_fallingdetect,
bank->base + bank->regs->fallingdetect);
__raw_writel(bank->saved_risingdetect,
bank->base + bank->regs->risingdetect);
l = __raw_readl(bank->base + bank->regs->datain);

/* Check if any of the non-wakeup interrupt GPIOs have changed
* state. If so, generate an IRQ by software. This is
Expand Down Expand Up @@ -1383,35 +1344,24 @@ void omap2_gpio_resume_after_idle(void)
if (gen) {
u32 old0, old1;

old0 = __raw_readl(bank->base +
bank->regs->leveldetect0);
old1 = __raw_readl(bank->base +
bank->regs->leveldetect1);

if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
old0 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
old1 = __raw_readl(bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
__raw_writel(old0 | gen, bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
__raw_writel(old1 | gen, bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
__raw_writel(old0, bank->base +
OMAP24XX_GPIO_LEVELDETECT0);
__raw_writel(old1, bank->base +
OMAP24XX_GPIO_LEVELDETECT1);
old0 |= gen;
old1 |= gen;
}

if (cpu_is_omap44xx()) {
old0 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT0);
old1 = __raw_readl(bank->base +
OMAP4_GPIO_LEVELDETECT1);
__raw_writel(old0 | l, bank->base +
OMAP4_GPIO_LEVELDETECT0);
__raw_writel(old1 | l, bank->base +
OMAP4_GPIO_LEVELDETECT1);
__raw_writel(old0, bank->base +
OMAP4_GPIO_LEVELDETECT0);
__raw_writel(old1, bank->base +
OMAP4_GPIO_LEVELDETECT1);
old0 |= l;
old1 |= l;
}
__raw_writel(old0, bank->base +
bank->regs->leveldetect0);
__raw_writel(old1, bank->base +
bank->regs->leveldetect1);
}
}
}
Expand Down

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