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yaml --- r: 309520 b: refs/heads/master c: c2e1ff3 h: refs/heads/master v: v3
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David S. Miller
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May 28, 2012
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| --- | ||
| refs/heads/master: 456d3d42460c1fc20ba0d27442443fcd63aaac35 | ||
| refs/heads/master: c2e1ff39c106ab026e3feb29c038855b7ed00393 |
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52 changes: 52 additions & 0 deletions
52
trunk/Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt
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| * Samsung Exynos Interrupt Combiner Controller | ||
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| Samsung's Exynos4 architecture includes a interrupt combiner controller which | ||
| can combine interrupt sources as a group and provide a single interrupt request | ||
| for the group. The interrupt request from each group are connected to a parent | ||
| interrupt controller, such as GIC in case of Exynos4210. | ||
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| The interrupt combiner controller consists of multiple combiners. Upto eight | ||
| interrupt sources can be connected to a combiner. The combiner outputs one | ||
| combined interrupt for its eight interrupt sources. The combined interrupt | ||
| is usually connected to a parent interrupt controller. | ||
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| A single node in the device tree is used to describe the interrupt combiner | ||
| controller module (which includes multiple combiners). A combiner in the | ||
| interrupt controller module shares config/control registers with other | ||
| combiners. For example, a 32-bit interrupt enable/disable config register | ||
| can accommodate upto 4 interrupt combiners (with each combiner supporting | ||
| upto 8 interrupt sources). | ||
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| Required properties: | ||
| - compatible: should be "samsung,exynos4210-combiner". | ||
| - interrupt-controller: Identifies the node as an interrupt controller. | ||
| - #interrupt-cells: should be <2>. The meaning of the cells are | ||
| * First Cell: Combiner Group Number. | ||
| * Second Cell: Interrupt number within the group. | ||
| - reg: Base address and size of interrupt combiner registers. | ||
| - interrupts: The list of interrupts generated by the combiners which are then | ||
| connected to a parent interrupt controller. The format of the interrupt | ||
| specifier depends in the interrupt parent controller. | ||
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| Optional properties: | ||
| - samsung,combiner-nr: The number of interrupt combiners supported. If this | ||
| property is not specified, the default number of combiners is assumed | ||
| to be 16. | ||
| - interrupt-parent: pHandle of the parent interrupt controller, if not | ||
| inherited from the parent node. | ||
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| Example: | ||
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| The following is a an example from the Exynos4210 SoC dtsi file. | ||
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| combiner:interrupt-controller@10440000 { | ||
| compatible = "samsung,exynos4210-combiner"; | ||
| interrupt-controller; | ||
| #interrupt-cells = <2>; | ||
| reg = <0x10440000 0x1000>; | ||
| interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, | ||
| <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | ||
| <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | ||
| <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; | ||
| }; |
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18
trunk/Documentation/devicetree/bindings/arm/spear-timer.txt
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| * SPEAr ARM Timer | ||
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| ** Timer node required properties: | ||
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| - compatible : Should be: | ||
| "st,spear-timer" | ||
| - reg: Address range of the timer registers | ||
| - interrupt-parent: Should be the phandle for the interrupt controller | ||
| that services interrupts for this device | ||
| - interrupt: Should contain the timer interrupt number | ||
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| Example: | ||
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| timer@f0000000 { | ||
| compatible = "st,spear-timer"; | ||
| reg = <0xf0000000 0x400>; | ||
| interrupts = <2>; | ||
| }; |
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11
trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-ahb.txt
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| NVIDIA Tegra AHB | ||
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| Required properties: | ||
| - compatible : "nvidia,tegra20-ahb" or "nvidia,tegra30-ahb" | ||
| - reg : Should contain 1 register ranges(address and length) | ||
|
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| Example: | ||
| ahb: ahb@6000c004 { | ||
| compatible = "nvidia,tegra20-ahb"; | ||
| reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */ | ||
| }; |
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trunk/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt
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| * Freescale MXS DMA | ||
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| Required properties: | ||
| - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx" | ||
| - reg : Should contain registers location and length | ||
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| Supported chips: | ||
| imx23, imx28. | ||
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| Examples: | ||
| dma-apbh@80004000 { | ||
| compatible = "fsl,imx28-dma-apbh"; | ||
| reg = <0x80004000 2000>; | ||
| }; | ||
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| dma-apbx@80024000 { | ||
| compatible = "fsl,imx28-dma-apbx"; | ||
| reg = <0x80024000 2000>; | ||
| }; |
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| * Synopsys Designware DMA Controller | ||
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| Required properties: | ||
| - compatible: "snps,dma-spear1340" | ||
| - reg: Address range of the DMAC registers | ||
| - interrupt-parent: Should be the phandle for the interrupt controller | ||
| that services interrupts for this device | ||
| - interrupt: Should contain the DMAC interrupt number | ||
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| Example: | ||
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| dma@fc000000 { | ||
| compatible = "snps,dma-spear1340"; | ||
| reg = <0xfc000000 0x1000>; | ||
| interrupt-parent = <&vic1>; | ||
| interrupts = <12>; | ||
| }; |
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