Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history 
yaml
---
r: 191695
b: refs/heads/master
c: d28bdf0
h: refs/heads/master
i:
  191693: aead896
  191691: 52f6590
  191687: eaf8c9c
  191679: 8ae52fa
v: v3
  • Loading branch information
Magnus Damm authored and Paul Mundt committed May 13, 2010
1 parent 491cb2a commit 9fde3a4
Show file tree
Hide file tree
Showing 3 changed files with 153 additions and 147 deletions.
2 changes: 1 addition & 1 deletion [refs]
View file
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 441c2440aba2efd8d0f48a5e3357deec92283d62
refs/heads/master: d28bdf05f72238d626c8d06b61049f6df8d78e70
147 changes: 1 addition & 146 deletions trunk/arch/sh/include/asm/clock.h
View file
Original file line number Diff line number Diff line change
@@ -1,158 +1,13 @@
#ifndef __ASM_SH_CLOCK_H
#define __ASM_SH_CLOCK_H

#include <linux/list.h>
#include <linux/seq_file.h>
#include <linux/cpufreq.h>
#include <linux/clk.h>
#include <linux/err.h>

struct clk;

struct clk_ops {
void (*init)(struct clk *clk);
int (*enable)(struct clk *clk);
void (*disable)(struct clk *clk);
unsigned long (*recalc)(struct clk *clk);
int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
int (*set_parent)(struct clk *clk, struct clk *parent);
long (*round_rate)(struct clk *clk, unsigned long rate);
};

struct clk {
struct list_head node;
const char *name;
int id;

struct clk *parent;
struct clk_ops *ops;

struct list_head children;
struct list_head sibling; /* node for children */

int usecount;

unsigned long rate;
unsigned long flags;

void __iomem *enable_reg;
unsigned int enable_bit;

unsigned long arch_flags;
void *priv;
struct dentry *dentry;
struct cpufreq_frequency_table *freq_table;
};

#define CLK_ENABLE_ON_INIT (1 << 0)
#include <linux/sh_clk.h>

/* Should be defined by processor-specific code */
void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
int __init arch_clk_init(void);

/* arch/sh/kernel/cpu/clock.c */
int clk_init(void);
unsigned long followparent_recalc(struct clk *);
void recalculate_root_clocks(void);
void propagate_rate(struct clk *);
int clk_reparent(struct clk *child, struct clk *parent);
int clk_register(struct clk *);
void clk_unregister(struct clk *);

/* arch/sh/kernel/cpu/clock-cpg.c */
int __init __deprecated cpg_clk_init(void);

/* the exported API, in addition to clk_set_rate */
/**
* clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
* @clk: clock source
* @rate: desired clock rate in Hz
* @algo_id: algorithm id to be passed down to ops->set_rate
*
* Returns success (0) or negative errno.
*/
int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);

enum clk_sh_algo_id {
NO_CHANGE = 0,

IUS_N1_N1,
IUS_322,
IUS_522,
IUS_N11,

SB_N1,

SB3_N1,
SB3_32,
SB3_43,
SB3_54,

BP_N1,

IP_N1,
};

struct clk_div_mult_table {
unsigned int *divisors;
unsigned int nr_divisors;
unsigned int *multipliers;
unsigned int nr_multipliers;
};

struct cpufreq_frequency_table;
void clk_rate_table_build(struct clk *clk,
struct cpufreq_frequency_table *freq_table,
int nr_freqs,
struct clk_div_mult_table *src_table,
unsigned long *bitmap);

long clk_rate_table_round(struct clk *clk,
struct cpufreq_frequency_table *freq_table,
unsigned long rate);

int clk_rate_table_find(struct clk *clk,
struct cpufreq_frequency_table *freq_table,
unsigned long rate);

#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_enable_reg, \
.enable_bit = _enable_bit, \
.flags = _flags, \
}

int sh_clk_mstp32_register(struct clk *clks, int nr);

#define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_reg, \
.enable_bit = _shift, \
.arch_flags = _div_bitmap, \
.flags = _flags, \
}

struct clk_div4_table {
struct clk_div_mult_table *div_mult_table;
void (*kick)(struct clk *clk);
};

int sh_clk_div4_register(struct clk *clks, int nr,
struct clk_div4_table *table);
int sh_clk_div4_enable_register(struct clk *clks, int nr,
struct clk_div4_table *table);
int sh_clk_div4_reparent_register(struct clk *clks, int nr,
struct clk_div4_table *table);

#define SH_CLK_DIV6(_parent, _reg, _flags) \
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_reg, \
.flags = _flags, \
}

int sh_clk_div6_register(struct clk *clks, int nr);

#endif /* __ASM_SH_CLOCK_H */
151 changes: 151 additions & 0 deletions trunk/include/linux/sh_clk.h
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,151 @@
#ifndef __SH_CLOCK_H
#define __SH_CLOCK_H

#include <linux/list.h>
#include <linux/seq_file.h>
#include <linux/cpufreq.h>
#include <linux/clk.h>
#include <linux/err.h>

struct clk;

struct clk_ops {
void (*init)(struct clk *clk);
int (*enable)(struct clk *clk);
void (*disable)(struct clk *clk);
unsigned long (*recalc)(struct clk *clk);
int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
int (*set_parent)(struct clk *clk, struct clk *parent);
long (*round_rate)(struct clk *clk, unsigned long rate);
};

struct clk {
struct list_head node;
const char *name;
int id;

struct clk *parent;
struct clk_ops *ops;

struct list_head children;
struct list_head sibling; /* node for children */

int usecount;

unsigned long rate;
unsigned long flags;

void __iomem *enable_reg;
unsigned int enable_bit;

unsigned long arch_flags;
void *priv;
struct dentry *dentry;
struct cpufreq_frequency_table *freq_table;
};

#define CLK_ENABLE_ON_INIT (1 << 0)

/* arch/sh/kernel/cpu/clock.c */
int clk_init(void);
unsigned long followparent_recalc(struct clk *);
void recalculate_root_clocks(void);
void propagate_rate(struct clk *);
int clk_reparent(struct clk *child, struct clk *parent);
int clk_register(struct clk *);
void clk_unregister(struct clk *);

/* the exported API, in addition to clk_set_rate */
/**
* clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
* @clk: clock source
* @rate: desired clock rate in Hz
* @algo_id: algorithm id to be passed down to ops->set_rate
*
* Returns success (0) or negative errno.
*/
int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);

enum clk_sh_algo_id {
NO_CHANGE = 0,

IUS_N1_N1,
IUS_322,
IUS_522,
IUS_N11,

SB_N1,

SB3_N1,
SB3_32,
SB3_43,
SB3_54,

BP_N1,

IP_N1,
};

struct clk_div_mult_table {
unsigned int *divisors;
unsigned int nr_divisors;
unsigned int *multipliers;
unsigned int nr_multipliers;
};

struct cpufreq_frequency_table;
void clk_rate_table_build(struct clk *clk,
struct cpufreq_frequency_table *freq_table,
int nr_freqs,
struct clk_div_mult_table *src_table,
unsigned long *bitmap);

long clk_rate_table_round(struct clk *clk,
struct cpufreq_frequency_table *freq_table,
unsigned long rate);

int clk_rate_table_find(struct clk *clk,
struct cpufreq_frequency_table *freq_table,
unsigned long rate);

#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_enable_reg, \
.enable_bit = _enable_bit, \
.flags = _flags, \
}

int sh_clk_mstp32_register(struct clk *clks, int nr);

#define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_reg, \
.enable_bit = _shift, \
.arch_flags = _div_bitmap, \
.flags = _flags, \
}

struct clk_div4_table {
struct clk_div_mult_table *div_mult_table;
void (*kick)(struct clk *clk);
};

int sh_clk_div4_register(struct clk *clks, int nr,
struct clk_div4_table *table);
int sh_clk_div4_enable_register(struct clk *clks, int nr,
struct clk_div4_table *table);
int sh_clk_div4_reparent_register(struct clk *clks, int nr,
struct clk_div4_table *table);

#define SH_CLK_DIV6(_parent, _reg, _flags) \
{ \
.parent = _parent, \
.enable_reg = (void __iomem *)_reg, \
.flags = _flags, \
}

int sh_clk_div6_register(struct clk *clks, int nr);

#endif /* __SH_CLOCK_H */

0 comments on commit 9fde3a4

Please sign in to comment.