---

yaml
---
r: 158093
b: refs/heads/master
c: 50020fb
h: refs/heads/master
i:
  158091: 688f8bb
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 04bfdd8406099fca2e6b8844748c4d6c5eba8c8d
+refs/heads/master: 50020fb6324465e478d6c8cdbf3c695f0a60358d

trunk/arch/x86/include/asm/amd_iommu_types.h

@@ -160,6 +160,10 @@
 				  ((1ULL << PM_LEVEL_SHIFT((x))) - 1): \
 				   (0xffffffffffffffffULL))
 #define PM_LEVEL_INDEX(x, a)	(((a) >> PM_LEVEL_SHIFT((x))) & 0x1ffULL)
+#define PM_LEVEL_ENC(x)		(((x) << 9) & 0xe00ULL)
+#define PM_LEVEL_PDE(x, a)	((a) | PM_LEVEL_ENC((x)) | \
+				 IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW)
+
 
 #define IOMMU_PTE_L2_INDEX(address) (((address) >> 30) & 0x1ffULL)
 #define IOMMU_PTE_L1_INDEX(address) (((address) >> 21) & 0x1ffULL)

trunk/arch/x86/kernel/amd_iommu.c

@@ -1324,6 +1324,33 @@ static void update_domain(struct protection_domain *domain)
 	domain->updated = false;
 }
 
+/*
+ * This function is used to add another level to an IO page table. Adding
+ * another level increases the size of the address space by 9 bits to a size up
+ * to 64 bits.
+ */
+static bool increase_address_space(struct protection_domain *domain,
+				   gfp_t gfp)
+{
+	u64 *pte;
+
+	if (domain->mode == PAGE_MODE_6_LEVEL)
+		/* address space already 64 bit large */
+		return false;
+
+	pte = (void *)get_zeroed_page(gfp);
+	if (!pte)
+		return false;
+
+	*pte             = PM_LEVEL_PDE(domain->mode,
+					virt_to_phys(domain->pt_root));
+	domain->pt_root  = pte;
+	domain->mode    += 1;
+	domain->updated  = true;
+
+	return true;
+}
+
 /*
  * If the pte_page is not yet allocated this function is called
  */