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[POWERPC] mpc5200: Switch mpc5200 dts files to dts-v1 format
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Grant Likely committed Apr 29, 2008
1 parent 8f3ba2d commit a2884f3
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Showing 5 changed files with 286 additions and 288 deletions.
98 changes: 47 additions & 51 deletions arch/powerpc/boot/dts/cm5200.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -10,11 +10,7 @@
* option) any later version.
*/

/*
* WARNING: Do not depend on this tree layout remaining static just yet.
* The MPC5200 device tree conventions are still in flux
* Keep an eye on the linuxppc-dev mailing list for more details
*/
/dts-v1/;

/ {
model = "schindler,cm5200";
Expand All @@ -29,10 +25,10 @@
PowerPC,5200@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>;
i-cache-line-size = <20>;
d-cache-size = <4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <0x4000>; // L1, 16K
i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
Expand All @@ -41,143 +37,143 @@

memory {
device_type = "memory";
reg = <00000000 04000000>; // 64MB
reg = <0x00000000 0x04000000>; // 64MB
};

soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 f0000000 0000c000>;
reg = <f0000000 00000100>;
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader

cdm@200 {
compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
reg = <200 38>;
reg = <0x200 0x38>;
};

mpc5200_pic: pic@500 {
mpc5200_pic: interrupt-controller@500 {
// 5200 interrupts are encoded into two levels;
interrupt-controller;
#interrupt-cells = <3>;
compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
reg = <500 80>;
reg = <0x500 0x80>;
};

timer@600 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <600 10>;
reg = <0x600 0x10>;
interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>;
fsl,has-wdt;
};

timer@610 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <610 10>;
interrupts = <1 a 0>;
reg = <0x610 0x10>;
interrupts = <1 10 0>;
interrupt-parent = <&mpc5200_pic>;
};

timer@620 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <620 10>;
interrupts = <1 b 0>;
reg = <0x620 0x10>;
interrupts = <1 11 0>;
interrupt-parent = <&mpc5200_pic>;
};

timer@630 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <630 10>;
interrupts = <1 c 0>;
reg = <0x630 0x10>;
interrupts = <1 12 0>;
interrupt-parent = <&mpc5200_pic>;
};

timer@640 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <640 10>;
interrupts = <1 d 0>;
reg = <0x640 0x10>;
interrupts = <1 13 0>;
interrupt-parent = <&mpc5200_pic>;
};

timer@650 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <650 10>;
interrupts = <1 e 0>;
reg = <0x650 0x10>;
interrupts = <1 14 0>;
interrupt-parent = <&mpc5200_pic>;
};

timer@660 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <660 10>;
interrupts = <1 f 0>;
reg = <0x660 0x10>;
interrupts = <1 15 0>;
interrupt-parent = <&mpc5200_pic>;
};

timer@670 { // General Purpose Timer
compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
reg = <670 10>;
interrupts = <1 10 0>;
reg = <0x670 0x10>;
interrupts = <1 16 0>;
interrupt-parent = <&mpc5200_pic>;
};

rtc@800 { // Real time clock
compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
reg = <800 100>;
reg = <0x800 0x100>;
interrupts = <1 5 0 1 6 0>;
interrupt-parent = <&mpc5200_pic>;
};

gpio@b00 {
compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
reg = <b00 40>;
reg = <0xb00 0x40>;
interrupts = <1 7 0>;
interrupt-parent = <&mpc5200_pic>;
};

gpio@c00 {
compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
reg = <c00 40>;
reg = <0xc00 0x40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <&mpc5200_pic>;
};

spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
reg = <0xf00 0x20>;
interrupts = <2 13 0 2 14 0>;
interrupt-parent = <&mpc5200_pic>;
};

usb@1000 {
compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
reg = <1000 ff>;
reg = <0x1000 0xff>;
interrupts = <2 6 0>;
interrupt-parent = <&mpc5200_pic>;
};

dma-controller@1200 {
compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
reg = <1200 80>;
reg = <0x1200 0x80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
3 8 0 3 9 0 3 a 0 3 b 0
3 c 0 3 d 0 3 e 0 3 f 0>;
3 8 0 3 9 0 3 10 0 3 11 0
3 12 0 3 13 0 3 14 0 3 15 0>;
interrupt-parent = <&mpc5200_pic>;
};

xlb@1f00 {
compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
reg = <1f00 100>;
reg = <0x1f00 0x100>;
};

serial@2000 { // PSC1
device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
reg = <2000 100>;
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
interrupt-parent = <&mpc5200_pic>;
};
Expand All @@ -186,7 +182,7 @@
device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
port-number = <1>; // Logical port assignment
reg = <2200 100>;
reg = <0x2200 0x100>;
interrupts = <2 2 0>;
interrupt-parent = <&mpc5200_pic>;
};
Expand All @@ -195,7 +191,7 @@
device_type = "serial";
compatible = "fsl,mpc5200-psc-uart";
port-number = <2>; // Logical port assignment
reg = <2400 100>;
reg = <0x2400 0x100>;
interrupts = <2 3 0>;
interrupt-parent = <&mpc5200_pic>;
};
Expand All @@ -204,15 +200,15 @@
device_type = "serial";
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
port-number = <5>; // Logical port assignment
reg = <2c00 100>;
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
interrupt-parent = <&mpc5200_pic>;
};

ethernet@3000 {
device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
reg = <3000 400>;
reg = <0x3000 0x400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
Expand All @@ -223,7 +219,7 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
reg = <3000 400>; // fec range, since we need to setup fec interrupts
reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
interrupt-parent = <&mpc5200_pic>;

Expand All @@ -237,15 +233,15 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
reg = <0x3d40 0x40>;
interrupts = <2 16 0>;
interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
};

sram@8000 {
compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
reg = <8000 4000>;
reg = <0x8000 0x4000>;
};
};

Expand All @@ -254,12 +250,12 @@
compatible = "fsl,lpb";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 fc000000 2000000>;
ranges = <0 0 0xfc000000 0x2000000>;

// 16-bit flash device at LocalPlus Bus CS0
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 2000000>;
reg = <0 0 0x2000000>;
bank-width = <2>;
device-width = <2>;
#size-cells = <1>;
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