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yaml
---
r: 185147
b: refs/heads/master
c: 99d113b
h: refs/heads/master
i:
  185145: 5622519
  185143: 6ac0a80
v: v3
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H. Peter Anvin committed Jan 5, 2010
1 parent bab898a commit a4634f2
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Showing 2 changed files with 21 additions and 9 deletions.
2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 9959c888a38b0f25b0e81a480f537d6489348442
refs/heads/master: 99d113b17e8ca5a8b68a9d3f7691e2f552dd6a06
28 changes: 20 additions & 8 deletions trunk/arch/x86/include/asm/irq_vectors.h
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/*
* IDT vectors usable for external interrupt sources start
* at 0x20:
* hpa said we can start from 0x1f.
* 0x1f is documented as reserved. However, the ability for the APIC
* to generate vectors starting at 0x10 is documented, as is the
* ability for the CPU to receive any vector number as an interrupt.
* 0x1f is used for IRQ_MOVE_CLEANUP_VECTOR since that vector needs
* an entire privilege level (16 vectors) all by itself at a higher
* priority than any actual device vector. Thus, by placing it in the
* otherwise-unusable 0x10 privilege level, we avoid wasting a full
* 16-vector block.
*/
#define FIRST_EXTERNAL_VECTOR 0x20
#define FIRST_EXTERNAL_VECTOR 0x1f

#define IA32_SYSCALL_VECTOR 0x80
#ifdef CONFIG_X86_32
# define SYSCALL_VECTOR 0x80
# define IA32_SYSCALL_VECTOR 0x80
#else
# define IA32_SYSCALL_VECTOR 0x80
#endif

/*
* Reserve the lowest usable priority level 0x20 - 0x2f for triggering
* Reserve the lowest usable priority level 0x10 - 0x1f for triggering
* cleanup after irq migration.
* this overlaps with the reserved range for cpu exceptions so this
* will need to be changed to 0x20 - 0x2f if the last cpu exception is
* ever allocated.
*/

#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR

/*
* Vectors 0x30-0x3f are used for ISA interrupts.
* Vectors 0x20-0x2f are used for ISA interrupts.
* round up to the next 16-vector boundary
*/
#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
#define IRQ0_VECTOR ((FIRST_EXTERNAL_VECTOR + 16) & ~15)

#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
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/*
* First APIC vector available to drivers: (vectors 0x30-0xee) we
* start at 0x31(0x41) to spread out vectors evenly between priority
* start at 0x31 to spread out vectors evenly between priority
* levels. (0x80 is the syscall vector)
*/
#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
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