Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 257567
b: refs/heads/master
c: 469bb63
h: refs/heads/master
i:
  257565: ed70112
  257563: 5098d82
  257559: 4f43650
  257551: ae57582
  257535: eb967fc
v: v3
  • Loading branch information
Mark Brown committed Jul 4, 2011
1 parent 3f0f4be commit a5fbfea
Show file tree
Hide file tree
Showing 3 changed files with 9 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: b5f9cfed12dc639cce5a8b6e741352980e05a8a9
refs/heads/master: 469bb638dc2a6ea87ea56256f25cc964deb3cf2b
2 changes: 2 additions & 0 deletions trunk/sound/soc/codecs/wm8994.c
Original file line number Diff line number Diff line change
Expand Up @@ -1713,6 +1713,8 @@ static int _wm8994_set_fll(struct snd_soc_codec *codec, int id, int src,
snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
WM8994_FLL1_ENA | WM8994_FLL1_FRAC,
reg);

msleep(5);
}

wm8994->fll[id].in = freq_in;
Expand Down
6 changes: 6 additions & 0 deletions trunk/sound/soc/tegra/tegra_i2s.c
Original file line number Diff line number Diff line change
Expand Up @@ -222,12 +222,18 @@ static int tegra_i2s_hw_params(struct snd_pcm_substream *substream,
if (i2sclock % (2 * srate))
reg |= TEGRA_I2S_TIMING_NON_SYM_ENABLE;

if (!i2s->clk_refs)
clk_enable(i2s->clk_i2s);

tegra_i2s_write(i2s, TEGRA_I2S_TIMING, reg);

tegra_i2s_write(i2s, TEGRA_I2S_FIFO_SCR,
TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS |
TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS);

if (!i2s->clk_refs)
clk_disable(i2s->clk_i2s);

return 0;
}

Expand Down

0 comments on commit a5fbfea

Please sign in to comment.