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Merge branch 'depends/gpio-devel' into next/soc
Pulling in a newer version of the depend branch from the gpio tree, since there was some randconfig breakage introduced at the version we had, and we want to keep those things as bisectable as possible. It's not bad enough to warrant a rebase though, so there'll be a window of exposure to this. * depends/gpio-devel: gpio: SPEAr: add spi chipselect control driver gpio: gpio-max710x: Support device tree probing gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration gpio: tegra: read output value when gpio is set in direction_out gpio: pca953x: Add compatible strings to gpio-pca953x driver gpio: pca953x: Register an IRQ domain gpio: mvebu: Set free callback for gpio_chip gpio: tegra: Drop exporting static functions gpio: tegra: Staticize non-exported symbols gpio: tegra: fix suspend/resume apis gpio-pch: Set parent dev for gpio chip gpio: em: Fix build errors Signed-off-by: Olof Johansson <olof@lixom.net>
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=== ST Microelectronics SPEAr SPI CS Driver === | ||
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SPEAr platform provides a provision to control chipselects of ARM PL022 Prime | ||
Cell spi controller through its system registers, which otherwise remains under | ||
PL022 control. If chipselect remain under PL022 control then they would be | ||
released as soon as transfer is over and TxFIFO becomes empty. This is not | ||
desired by some of the device protocols above spi which expect (multiple) | ||
transfers without releasing their chipselects. | ||
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Chipselects can be controlled by software by turning them as GPIOs. SPEAr | ||
provides another interface through system registers through which software can | ||
directly control each PL022 chipselect. Hence, it is natural for SPEAr to export | ||
the control of this interface as gpio. | ||
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Required properties: | ||
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* compatible: should be defined as "st,spear-spics-gpio" | ||
* reg: mentioning address range of spics controller | ||
* st-spics,peripcfg-reg: peripheral configuration register offset | ||
* st-spics,sw-enable-bit: bit offset to enable sw control | ||
* st-spics,cs-value-bit: bit offset to drive chipselect low or high | ||
* st-spics,cs-enable-mask: chip select number bit mask | ||
* st-spics,cs-enable-shift: chip select number program offset | ||
* gpio-controller: Marks the device node as gpio controller | ||
* #gpio-cells: should be 1 and will mention chip select number | ||
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All the above bit offsets are within peripcfg register. | ||
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Example: | ||
------- | ||
spics: spics@e0700000{ | ||
compatible = "st,spear-spics-gpio"; | ||
reg = <0xe0700000 0x1000>; | ||
st-spics,peripcfg-reg = <0x3b0>; | ||
st-spics,sw-enable-bit = <12>; | ||
st-spics,cs-value-bit = <11>; | ||
st-spics,cs-enable-mask = <3>; | ||
st-spics,cs-enable-shift = <8>; | ||
gpio-controller; | ||
#gpio-cells = <2>; | ||
}; | ||
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spi0: spi@e0100000 { | ||
status = "okay"; | ||
num-cs = <3>; | ||
cs-gpios = <&gpio1 7 0>, <&spics 0>, | ||
<&spics 1>; | ||
... | ||
} |
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