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ARM: OMAP2+: Add clock domain support for dm816x
This patch adds required definitions and structures for clockdomain initialization, so omap3xxx_clockdomains_init() was substituted by new ti81xx_clockdomains_init() while early initialization of TI81XX platform. Note that we now need to have 81xx in a separate CONFIG_SOC_TI81XX block instead inside the ifdef block for omap3 to avoid make randconfig build errors. This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches published at: http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> [tony@atomide.com: updated to apply, renamed to clockdomains81xx.c, fixed to use am33xx_clkdm_operations, various fixes suggested by Paul Walmsley] Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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/* | ||
* TI81XX Clock Domain data. | ||
* | ||
* Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ | ||
* Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/ | ||
* | ||
* This program is free software; you can redistribute it and/or | ||
* modify it under the terms of the GNU General Public License as | ||
* published by the Free Software Foundation version 2. | ||
* | ||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
* kind, whether express or implied; without even the implied warranty | ||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
* GNU General Public License for more details. | ||
*/ | ||
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#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_81XX_H | ||
#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_81XX_H | ||
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#include <linux/kernel.h> | ||
#include <linux/io.h> | ||
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#include "clockdomain.h" | ||
#include "cm81xx.h" | ||
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/* | ||
* Note that 814x seems to have HWSUP_SWSUP for many clockdomains | ||
* while 816x does not. According to the TRM, 816x only has HWSUP | ||
* for ALWON_L3_FAST. Also note that the TI tree clockdomains81xx.h | ||
* seems to have the related ifdef the wrong way around claiming | ||
* 816x supports HWSUP while 814x does not. For now, we only set | ||
* HWSUP for ALWON_L3_FAST as that seems to be supported for both | ||
* dm814x and dm816x. | ||
*/ | ||
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/* Common for 81xx */ | ||
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static struct clockdomain alwon_l3_slow_81xx_clkdm = { | ||
.name = "alwon_l3s_clkdm", | ||
.pwrdm = { .name = "alwon_pwrdm" }, | ||
.cm_inst = TI81XX_CM_ALWON_MOD, | ||
.clkdm_offs = TI81XX_CM_ALWON_L3_SLOW_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain alwon_l3_med_81xx_clkdm = { | ||
.name = "alwon_l3_med_clkdm", | ||
.pwrdm = { .name = "alwon_pwrdm" }, | ||
.cm_inst = TI81XX_CM_ALWON_MOD, | ||
.clkdm_offs = TI81XX_CM_ALWON_L3_MED_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain alwon_l3_fast_81xx_clkdm = { | ||
.name = "alwon_l3_fast_clkdm", | ||
.pwrdm = { .name = "alwon_pwrdm" }, | ||
.cm_inst = TI81XX_CM_ALWON_MOD, | ||
.clkdm_offs = TI81XX_CM_ALWON_L3_FAST_CLKDM, | ||
.flags = CLKDM_CAN_HWSUP_SWSUP, | ||
}; | ||
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static struct clockdomain alwon_ethernet_81xx_clkdm = { | ||
.name = "alwon_ethernet_clkdm", | ||
.pwrdm = { .name = "alwon_pwrdm" }, | ||
.cm_inst = TI81XX_CM_ALWON_MOD, | ||
.clkdm_offs = TI81XX_CM_ETHERNET_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain mmu_81xx_clkdm = { | ||
.name = "mmu_clkdm", | ||
.pwrdm = { .name = "alwon_pwrdm" }, | ||
.cm_inst = TI81XX_CM_ALWON_MOD, | ||
.clkdm_offs = TI81XX_CM_MMU_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain mmu_cfg_81xx_clkdm = { | ||
.name = "mmu_cfg_clkdm", | ||
.pwrdm = { .name = "alwon_pwrdm" }, | ||
.cm_inst = TI81XX_CM_ALWON_MOD, | ||
.clkdm_offs = TI81XX_CM_MMUCFG_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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/* 816x only */ | ||
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static struct clockdomain alwon_mpu_816x_clkdm = { | ||
.name = "alwon_mpu_clkdm", | ||
.pwrdm = { .name = "alwon_pwrdm" }, | ||
.cm_inst = TI81XX_CM_ALWON_MOD, | ||
.clkdm_offs = TI81XX_CM_ALWON_MPU_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain active_gem_816x_clkdm = { | ||
.name = "active_gem_clkdm", | ||
.pwrdm = { .name = "active_pwrdm" }, | ||
.cm_inst = TI816X_CM_ACTIVE_MOD, | ||
.clkdm_offs = TI816X_CM_ACTIVE_GEM_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain ivahd0_816x_clkdm = { | ||
.name = "ivahd0_clkdm", | ||
.pwrdm = { .name = "ivahd0_pwrdm" }, | ||
.cm_inst = TI816X_CM_IVAHD0_MOD, | ||
.clkdm_offs = TI816X_CM_IVAHD0_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain ivahd1_816x_clkdm = { | ||
.name = "ivahd1_clkdm", | ||
.pwrdm = { .name = "ivahd1_pwrdm" }, | ||
.cm_inst = TI816X_CM_IVAHD1_MOD, | ||
.clkdm_offs = TI816X_CM_IVAHD1_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain ivahd2_816x_clkdm = { | ||
.name = "ivahd2_clkdm", | ||
.pwrdm = { .name = "ivahd2_pwrdm" }, | ||
.cm_inst = TI816X_CM_IVAHD2_MOD, | ||
.clkdm_offs = TI816X_CM_IVAHD2_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain sgx_816x_clkdm = { | ||
.name = "sgx_clkdm", | ||
.pwrdm = { .name = "sgx_pwrdm" }, | ||
.cm_inst = TI816X_CM_SGX_MOD, | ||
.clkdm_offs = TI816X_CM_SGX_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain default_l3_med_816x_clkdm = { | ||
.name = "default_l3_med_clkdm", | ||
.pwrdm = { .name = "default_pwrdm" }, | ||
.cm_inst = TI816X_CM_DEFAULT_MOD, | ||
.clkdm_offs = TI816X_CM_DEFAULT_L3_MED_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain default_ducati_816x_clkdm = { | ||
.name = "default_ducati_clkdm", | ||
.pwrdm = { .name = "default_pwrdm" }, | ||
.cm_inst = TI816X_CM_DEFAULT_MOD, | ||
.clkdm_offs = TI816X_CM_DEFAULT_DUCATI_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain default_pci_816x_clkdm = { | ||
.name = "default_pci_clkdm", | ||
.pwrdm = { .name = "default_pwrdm" }, | ||
.cm_inst = TI816X_CM_DEFAULT_MOD, | ||
.clkdm_offs = TI816X_CM_DEFAULT_PCI_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain default_l3_slow_816x_clkdm = { | ||
.name = "default_l3_slow_clkdm", | ||
.pwrdm = { .name = "default_pwrdm" }, | ||
.cm_inst = TI816X_CM_DEFAULT_MOD, | ||
.clkdm_offs = TI816X_CM_DEFAULT_L3_SLOW_CLKDM, | ||
.flags = CLKDM_CAN_SWSUP, | ||
}; | ||
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static struct clockdomain *clockdomains_ti81xx[] __initdata = { | ||
&alwon_mpu_816x_clkdm, | ||
&alwon_l3_slow_81xx_clkdm, | ||
&alwon_l3_med_81xx_clkdm, | ||
&alwon_l3_fast_81xx_clkdm, | ||
&alwon_ethernet_81xx_clkdm, | ||
&mmu_81xx_clkdm, | ||
&mmu_cfg_81xx_clkdm, | ||
&active_gem_816x_clkdm, | ||
&ivahd0_816x_clkdm, | ||
&ivahd1_816x_clkdm, | ||
&ivahd2_816x_clkdm, | ||
&sgx_816x_clkdm, | ||
&default_l3_med_816x_clkdm, | ||
&default_ducati_816x_clkdm, | ||
&default_pci_816x_clkdm, | ||
&default_l3_slow_816x_clkdm, | ||
NULL, | ||
}; | ||
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void __init ti81xx_clockdomains_init(void) | ||
{ | ||
clkdm_register_platform_funcs(&am33xx_clkdm_operations); | ||
clkdm_register_clkdms(clockdomains_ti81xx); | ||
clkdm_complete_init(); | ||
} | ||
#endif |
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/* | ||
* Clock domain register offsets for TI81XX. | ||
* | ||
* Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ | ||
* Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/ | ||
* | ||
* This program is free software; you can redistribute it and/or | ||
* modify it under the terms of the GNU General Public License as | ||
* published by the Free Software Foundation version 2. | ||
* | ||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any | ||
* kind, whether express or implied; without even the implied warranty | ||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
* GNU General Public License for more details. | ||
*/ | ||
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#ifndef __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H | ||
#define __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H | ||
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/* TI81XX common CM module offsets */ | ||
#define TI81XX_CM_ALWON_MOD 0x1400 /* 1KB */ | ||
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/* TI816X CM module offsets */ | ||
#define TI816X_CM_ACTIVE_MOD 0x0400 /* 256B */ | ||
#define TI816X_CM_DEFAULT_MOD 0x0500 /* 256B */ | ||
#define TI816X_CM_IVAHD0_MOD 0x0600 /* 256B */ | ||
#define TI816X_CM_IVAHD1_MOD 0x0700 /* 256B */ | ||
#define TI816X_CM_IVAHD2_MOD 0x0800 /* 256B */ | ||
#define TI816X_CM_SGX_MOD 0x0900 /* 256B */ | ||
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/* ALWON */ | ||
#define TI81XX_CM_ALWON_L3_SLOW_CLKDM 0x0000 | ||
#define TI81XX_CM_ALWON_L3_MED_CLKDM 0x0004 | ||
#define TI81XX_CM_ETHERNET_CLKDM 0x0004 | ||
#define TI81XX_CM_MMU_CLKDM 0x000C | ||
#define TI81XX_CM_MMUCFG_CLKDM 0x0010 | ||
#define TI81XX_CM_ALWON_MPU_CLKDM 0x001C | ||
#define TI81XX_CM_ALWON_L3_FAST_CLKDM 0x0030 | ||
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/* ACTIVE */ | ||
#define TI816X_CM_ACTIVE_GEM_CLKDM 0x0000 | ||
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/* IVAHD0 */ | ||
#define TI816X_CM_IVAHD0_CLKDM 0x0000 | ||
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/* IVAHD1 */ | ||
#define TI816X_CM_IVAHD1_CLKDM 0x0000 | ||
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/* IVAHD2 */ | ||
#define TI816X_CM_IVAHD2_CLKDM 0x0000 | ||
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/* SGX */ | ||
#define TI816X_CM_SGX_CLKDM 0x0000 | ||
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/* DEFAULT */ | ||
#define TI816X_CM_DEFAULT_L3_MED_CLKDM 0x0004 | ||
#define TI816X_CM_DEFAULT_PCI_CLKDM 0x0010 | ||
#define TI816X_CM_DEFAULT_L3_SLOW_CLKDM 0x0014 | ||
#define TI816X_CM_DEFAULT_DUCATI_CLKDM 0x0018 | ||
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#endif |
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