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yaml
---
r: 372394
b: refs/heads/master
c: 17453dd
h: refs/heads/master
v: v3
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Heiko Stuebner authored and Kukjin Kim committed Mar 7, 2013
1 parent abf01f1 commit a726050
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Showing 4 changed files with 60 additions and 71 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 3d3eb5a476a55e9ef1aeaa6a3c2b00587ed32521
refs/heads/master: 17453dd2e7df20612770ebbf1ab5d506a432210c
1 change: 1 addition & 0 deletions trunk/arch/arm/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -778,6 +778,7 @@ config ARCH_S3C24XX
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
select MULTI_IRQ_HANDLER
select NEED_MACH_GPIO_H
select NEED_MACH_IO_H
help
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70 changes: 0 additions & 70 deletions trunk/arch/arm/mach-s3c24xx/include/mach/entry-macro.S

This file was deleted.

58 changes: 58 additions & 0 deletions trunk/arch/arm/mach-s3c24xx/irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@
#include <linux/device.h>
#include <linux/irqdomain.h>

#include <asm/exception.h>
#include <asm/mach/irq.h>

#include <mach/regs-irq.h>
Expand Down Expand Up @@ -282,6 +283,56 @@ static void s3c_irq_demux(unsigned int irq, struct irq_desc *desc)
chained_irq_exit(chip, desc);
}

static struct s3c_irq_intc *main_intc;
static struct s3c_irq_intc *main_intc2;

static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc,
struct pt_regs *regs)
{
int pnd;
int offset;
int irq;

pnd = __raw_readl(intc->reg_intpnd);
if (!pnd)
return false;

/* We have a problem that the INTOFFSET register does not always
* show one interrupt. Occasionally we get two interrupts through
* the prioritiser, and this causes the INTOFFSET register to show
* what looks like the logical-or of the two interrupt numbers.
*
* Thanks to Klaus, Shannon, et al for helping to debug this problem
*/
offset = __raw_readl(intc->reg_intpnd + 4);

/* Find the bit manually, when the offset is wrong.
* The pending register only ever contains the one bit of the next
* interrupt to handle.
*/
if (!(pnd & (1 << offset)))
offset = __ffs(pnd);

irq = irq_find_mapping(intc->domain, offset);
handle_IRQ(irq, regs);
return true;
}

asmlinkage void __exception_irq_entry s3c24xx_handle_irq(struct pt_regs *regs)
{
do {
if (likely(main_intc))
if (s3c24xx_handle_intc(main_intc, regs))
continue;

if (main_intc2)
if (s3c24xx_handle_intc(main_intc2, regs))
continue;

break;
} while (1);
}

#ifdef CONFIG_FIQ
/**
* s3c24xx_set_fiq - set the FIQ routing
Expand Down Expand Up @@ -502,6 +553,13 @@ static struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np,
goto err;
}

if (address == 0x4a000000)
main_intc = intc;
else if (address == 0x4a000040)
main_intc2 = intc;

set_handle_irq(s3c24xx_handle_irq);

return intc;

err:
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