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yaml
---
r: 322973
b: refs/heads/master
c: 37d7b34
h: refs/heads/master
i:
  322971: 53107ee
v: v3
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Yi Zou authored and Jens Axboe committed Aug 30, 2012
1 parent 6d7280b commit a874415
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2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 077fee003624c06a1349895d8c0f89cc625cc39e
refs/heads/master: 37d7b34f05b7bcca364bdf47d8955e766094a244
12 changes: 0 additions & 12 deletions trunk/Documentation/ABI/testing/sysfs-bus-pci
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Expand Up @@ -210,15 +210,3 @@ Users:
firmware assigned instance number of the PCI
device that can help in understanding the firmware
intended order of the PCI device.

What: /sys/bus/pci/devices/.../d3cold_allowed
Date: July 2012
Contact: Huang Ying <ying.huang@intel.com>
Description:
d3cold_allowed is bit to control whether the corresponding PCI
device can be put into D3Cold state. If it is cleared, the
device will never be put into D3Cold state. If it is set, the
device may be put into D3Cold state if other requirements are
satisfied too. Reading this attribute will show the current
value of d3cold_allowed bit. Writing this attribute will set
the value of d3cold_allowed bit.
2 changes: 1 addition & 1 deletion trunk/Documentation/feature-removal-schedule.txt
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Expand Up @@ -579,7 +579,7 @@ Why: KVM tracepoints provide mostly equivalent information in a much more
----------------------------

What: at91-mci driver ("CONFIG_MMC_AT91")
When: 3.8
When: 3.7
Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support
was added to atmel-mci as a first step to support more chips.
Then at91-mci was kept only for old IP versions (on at91rm9200 and
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1 change: 0 additions & 1 deletion trunk/Documentation/i2c/busses/i2c-i801
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Expand Up @@ -21,7 +21,6 @@ Supported adapters:
* Intel DH89xxCC (PCH)
* Intel Panther Point (PCH)
* Intel Lynx Point (PCH)
* Intel Lynx Point-LP (PCH)
Datasheets: Publicly available at the Intel website

On Intel Patsburg and later chipsets, both the normal host SMBus controller
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7 changes: 3 additions & 4 deletions trunk/MAINTAINERS
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Expand Up @@ -3388,7 +3388,7 @@ M: "Wolfram Sang (embedded platforms)" <w.sang@pengutronix.de>
L: linux-i2c@vger.kernel.org
W: http://i2c.wiki.kernel.org/
T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/
T: git git://git.pengutronix.de/git/wsa/linux.git
T: git git://git.fluff.org/bjdooks/linux.git
S: Maintained
F: Documentation/i2c/
F: drivers/i2c/
Expand Down Expand Up @@ -3666,12 +3666,11 @@ F: Documentation/networking/README.ipw2200
F: drivers/net/wireless/ipw2x00/

INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
M: Richard L Maliszewski <richard.l.maliszewski@intel.com>
M: Gang Wei <gang.wei@intel.com>
M: Joseph Cihula <joseph.cihula@intel.com>
M: Shane Wang <shane.wang@intel.com>
L: tboot-devel@lists.sourceforge.net
W: http://tboot.sourceforge.net
T: hg http://tboot.hg.sourceforge.net:8000/hgroot/tboot/tboot
T: Mercurial http://www.bughost.org/repos.hg/tboot.hg
S: Supported
F: Documentation/intel_txt.txt
F: include/linux/tboot.h
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2 changes: 1 addition & 1 deletion trunk/Makefile
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@@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 6
SUBLEVEL = 0
EXTRAVERSION = -rc6
EXTRAVERSION = -rc3
NAME = Saber-toothed Squirrel

# *DOCUMENTATION*
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2 changes: 1 addition & 1 deletion trunk/arch/arm/Kconfig
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Expand Up @@ -6,7 +6,7 @@ config ARM
select HAVE_DMA_API_DEBUG
select HAVE_IDE if PCI || ISA || PCMCIA
select HAVE_DMA_ATTRS
select HAVE_DMA_CONTIGUOUS if MMU
select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
select HAVE_MEMBLOCK
select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION
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6 changes: 3 additions & 3 deletions trunk/arch/arm/Kconfig.debug
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Expand Up @@ -356,15 +356,15 @@ choice
is nothing connected to read from the DCC.

config DEBUG_SEMIHOSTING
bool "Kernel low-level debug output via semihosting I/O"
bool "Kernel low-level debug output via semihosting I"
help
Semihosting enables code running on an ARM target to use
the I/O facilities on a host debugger/emulator through a
simple SVC call. The host debugger or emulator must have
simple SVC calls. The host debugger or emulator must have
semihosting enabled for the special svc call to be trapped
otherwise the kernel will crash.

This is known to work with OpenOCD, as well as
This is known to work with OpenOCD, as wellas
ARM's Fast Models, or any other controlling environment
that implements semihosting.

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4 changes: 2 additions & 2 deletions trunk/arch/arm/Makefile
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Expand Up @@ -284,10 +284,10 @@ zImage Image xipImage bootpImage uImage: vmlinux
zinstall uinstall install: vmlinux
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@

%.dtb: scripts
%.dtb:
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@

dtbs: scripts
dtbs:
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@

# We use MRPROPER_FILES and CLEAN_FILES now
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4 changes: 0 additions & 4 deletions trunk/arch/arm/boot/compressed/head.S
Original file line number Diff line number Diff line change
Expand Up @@ -659,14 +659,10 @@ __armv7_mmu_cache_on:
#ifdef CONFIG_CPU_ENDIAN_BE8
orr r0, r0, #1 << 25 @ big-endian page tables
#endif
mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
orrne r0, r0, #1 @ MMU enabled
movne r1, #0xfffffffd @ domain 0 = client
bic r6, r6, #1 << 31 @ 32-bit translation system
bic r6, r6, #3 << 0 @ use only ttbr0
mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
#endif
mcr p15, 0, r0, c7, c5, 4 @ ISB
mcr p15, 0, r0, c1, c0, 0 @ load control register
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2 changes: 1 addition & 1 deletion trunk/arch/arm/boot/dts/at91sam9g25ek.dts
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Expand Up @@ -15,7 +15,7 @@
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";

chosen {
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
};

ahb {
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2 changes: 1 addition & 1 deletion trunk/arch/arm/configs/armadillo800eva_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ CONFIG_AEABI=y
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
CONFIG_VFP=y
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8 changes: 0 additions & 8 deletions trunk/arch/arm/include/asm/assembler.h
Original file line number Diff line number Diff line change
Expand Up @@ -320,12 +320,4 @@
.size \name , . - \name
.endm

.macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
#ifndef CONFIG_CPU_USE_DOMAINS
adds \tmp, \addr, #\size - 1
sbcccs \tmp, \tmp, \limit
bcs \bad
#endif
.endm

#endif /* __ASM_ASSEMBLER_H__ */
7 changes: 0 additions & 7 deletions trunk/arch/arm/include/asm/dma-mapping.h
Original file line number Diff line number Diff line change
Expand Up @@ -202,13 +202,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
}

/*
* This can be called during early boot to increase the size of the atomic
* coherent DMA pool above the default value of 256KiB. It must be called
* before postcore_initcall.
*/
extern void __init init_dma_coherent_pool_size(unsigned long size);

/*
* This can be called during boot to increase the size of the consistent
* DMA region above it's default value of 2MB. It must be called before the
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3 changes: 0 additions & 3 deletions trunk/arch/arm/include/asm/memory.h
Original file line number Diff line number Diff line change
Expand Up @@ -187,7 +187,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
#endif
#endif
#endif /* __ASSEMBLY__ */

#ifndef PHYS_OFFSET
#ifdef PLAT_PHYS_OFFSET
Expand All @@ -197,8 +196,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
#endif
#endif

#ifndef __ASSEMBLY__

/*
* PFNs are used to describe any physical page; this means
* PFN 0 == physical address 0.
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4 changes: 0 additions & 4 deletions trunk/arch/arm/include/asm/tlb.h
Original file line number Diff line number Diff line change
Expand Up @@ -199,17 +199,13 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
{
pgtable_page_dtor(pte);

#ifdef CONFIG_ARM_LPAE
tlb_add_flush(tlb, addr);
#else
/*
* With the classic ARM MMU, a pte page has two corresponding pmd
* entries, each covering 1MB.
*/
addr &= PMD_MASK;
tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
tlb_add_flush(tlb, addr + SZ_1M);
#endif

tlb_remove_page(tlb, pte);
}
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58 changes: 15 additions & 43 deletions trunk/arch/arm/include/asm/uaccess.h
Original file line number Diff line number Diff line change
Expand Up @@ -101,97 +101,71 @@ extern int __get_user_1(void *);
extern int __get_user_2(void *);
extern int __get_user_4(void *);

#define __GUP_CLOBBER_1 "lr", "cc"
#ifdef CONFIG_CPU_USE_DOMAINS
#define __GUP_CLOBBER_2 "ip", "lr", "cc"
#else
#define __GUP_CLOBBER_2 "lr", "cc"
#endif
#define __GUP_CLOBBER_4 "lr", "cc"

#define __get_user_x(__r2,__p,__e,__l,__s) \
#define __get_user_x(__r2,__p,__e,__s,__i...) \
__asm__ __volatile__ ( \
__asmeq("%0", "r0") __asmeq("%1", "r2") \
__asmeq("%3", "r1") \
"bl __get_user_" #__s \
: "=&r" (__e), "=r" (__r2) \
: "0" (__p), "r" (__l) \
: __GUP_CLOBBER_##__s)
: "0" (__p) \
: __i, "cc")

#define __get_user_check(x,p) \
#define get_user(x,p) \
({ \
unsigned long __limit = current_thread_info()->addr_limit - 1; \
register const typeof(*(p)) __user *__p asm("r0") = (p);\
register unsigned long __r2 asm("r2"); \
register unsigned long __l asm("r1") = __limit; \
register int __e asm("r0"); \
switch (sizeof(*(__p))) { \
case 1: \
__get_user_x(__r2, __p, __e, __l, 1); \
break; \
__get_user_x(__r2, __p, __e, 1, "lr"); \
break; \
case 2: \
__get_user_x(__r2, __p, __e, __l, 2); \
__get_user_x(__r2, __p, __e, 2, "r3", "lr"); \
break; \
case 4: \
__get_user_x(__r2, __p, __e, __l, 4); \
__get_user_x(__r2, __p, __e, 4, "lr"); \
break; \
default: __e = __get_user_bad(); break; \
} \
x = (typeof(*(p))) __r2; \
__e; \
})

#define get_user(x,p) \
({ \
might_fault(); \
__get_user_check(x,p); \
})

extern int __put_user_1(void *, unsigned int);
extern int __put_user_2(void *, unsigned int);
extern int __put_user_4(void *, unsigned int);
extern int __put_user_8(void *, unsigned long long);

#define __put_user_x(__r2,__p,__e,__l,__s) \
#define __put_user_x(__r2,__p,__e,__s) \
__asm__ __volatile__ ( \
__asmeq("%0", "r0") __asmeq("%2", "r2") \
__asmeq("%3", "r1") \
"bl __put_user_" #__s \
: "=&r" (__e) \
: "0" (__p), "r" (__r2), "r" (__l) \
: "0" (__p), "r" (__r2) \
: "ip", "lr", "cc")

#define __put_user_check(x,p) \
#define put_user(x,p) \
({ \
unsigned long __limit = current_thread_info()->addr_limit - 1; \
register const typeof(*(p)) __r2 asm("r2") = (x); \
register const typeof(*(p)) __user *__p asm("r0") = (p);\
register unsigned long __l asm("r1") = __limit; \
register int __e asm("r0"); \
switch (sizeof(*(__p))) { \
case 1: \
__put_user_x(__r2, __p, __e, __l, 1); \
__put_user_x(__r2, __p, __e, 1); \
break; \
case 2: \
__put_user_x(__r2, __p, __e, __l, 2); \
__put_user_x(__r2, __p, __e, 2); \
break; \
case 4: \
__put_user_x(__r2, __p, __e, __l, 4); \
__put_user_x(__r2, __p, __e, 4); \
break; \
case 8: \
__put_user_x(__r2, __p, __e, __l, 8); \
__put_user_x(__r2, __p, __e, 8); \
break; \
default: __e = __put_user_bad(); break; \
} \
__e; \
})

#define put_user(x,p) \
({ \
might_fault(); \
__put_user_check(x,p); \
})

#else /* CONFIG_MMU */

/*
Expand Down Expand Up @@ -245,7 +219,6 @@ do { \
unsigned long __gu_addr = (unsigned long)(ptr); \
unsigned long __gu_val; \
__chk_user_ptr(ptr); \
might_fault(); \
switch (sizeof(*(ptr))) { \
case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \
case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \
Expand Down Expand Up @@ -327,7 +300,6 @@ do { \
unsigned long __pu_addr = (unsigned long)(ptr); \
__typeof__(*(ptr)) __pu_val = (x); \
__chk_user_ptr(ptr); \
might_fault(); \
switch (sizeof(*(ptr))) { \
case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \
case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \
Expand Down
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