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yaml --- r: 123135 b: refs/heads/master c: def434c h: refs/heads/master i: 123133: c71a0a1 123131: ad57efc 123127: e7db6fe 123119: 8aa2134 123103: abf7141 123071: 276ad40 123007: d1cac3e 122879: b3224e7 v: v3
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Benjamin Krill
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Arnd Bergmann
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Dec 22, 2008
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| --- | ||
| refs/heads/master: e68558ddcdbfa8cc2e7811bcada3bcbeef79fd4a | ||
| refs/heads/master: def434c2319c5a336633cd73322e0f28a7091b01 |
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| /* | ||
| * linux/arch/powerpc/platforms/cell/qpace_setup.c | ||
| * | ||
| * Copyright (C) 1995 Linus Torvalds | ||
| * Adapted from 'alpha' version by Gary Thomas | ||
| * Modified by Cort Dougan (cort@cs.nmt.edu) | ||
| * Modified by PPC64 Team, IBM Corp | ||
| * Modified by Cell Team, IBM Deutschland Entwicklung GmbH | ||
| * Modified by Benjamin Krill <ben@codiert.org>, IBM Corp. | ||
| * | ||
| * This program is free software; you can redistribute it and/or | ||
| * modify it under the terms of the GNU General Public License | ||
| * as published by the Free Software Foundation; either version | ||
| * 2 of the License, or (at your option) any later version. | ||
| */ | ||
|
|
||
| #include <linux/sched.h> | ||
| #include <linux/kernel.h> | ||
| #include <linux/init.h> | ||
| #include <linux/delay.h> | ||
| #include <linux/irq.h> | ||
| #include <linux/console.h> | ||
| #include <linux/of_platform.h> | ||
|
|
||
| #include <asm/mmu.h> | ||
| #include <asm/processor.h> | ||
| #include <asm/io.h> | ||
| #include <asm/kexec.h> | ||
| #include <asm/pgtable.h> | ||
| #include <asm/prom.h> | ||
| #include <asm/rtas.h> | ||
| #include <asm/dma.h> | ||
| #include <asm/machdep.h> | ||
| #include <asm/time.h> | ||
| #include <asm/cputable.h> | ||
| #include <asm/irq.h> | ||
| #include <asm/spu.h> | ||
| #include <asm/spu_priv1.h> | ||
| #include <asm/udbg.h> | ||
| #include <asm/cell-regs.h> | ||
|
|
||
| #include "interrupt.h" | ||
| #include "pervasive.h" | ||
| #include "ras.h" | ||
| #include "io-workarounds.h" | ||
|
|
||
| static void qpace_show_cpuinfo(struct seq_file *m) | ||
| { | ||
| struct device_node *root; | ||
| const char *model = ""; | ||
|
|
||
| root = of_find_node_by_path("/"); | ||
| if (root) | ||
| model = of_get_property(root, "model", NULL); | ||
| seq_printf(m, "machine\t\t: CHRP %s\n", model); | ||
| of_node_put(root); | ||
| } | ||
|
|
||
| static void qpace_progress(char *s, unsigned short hex) | ||
| { | ||
| printk("*** %04x : %s\n", hex, s ? s : ""); | ||
| } | ||
|
|
||
| static int __init qpace_publish_devices(void) | ||
| { | ||
| int node; | ||
|
|
||
| /* Publish OF platform devices for southbridge IOs */ | ||
| of_platform_bus_probe(NULL, NULL, NULL); | ||
|
|
||
| /* There is no device for the MIC memory controller, thus we create | ||
| * a platform device for it to attach the EDAC driver to. | ||
| */ | ||
| for_each_online_node(node) { | ||
| if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL) | ||
| continue; | ||
| platform_device_register_simple("cbe-mic", node, NULL, 0); | ||
| } | ||
|
|
||
| return 0; | ||
| } | ||
| machine_subsys_initcall(qpace, qpace_publish_devices); | ||
|
|
||
| extern int qpace_notify(struct device *dev) | ||
| { | ||
| /* set dma_ops for of_platform bus */ | ||
| if (dev->bus && dev->bus->name | ||
| && !strcmp(dev->bus->name, "of_platform")) | ||
| set_dma_ops(dev, &dma_direct_ops); | ||
|
|
||
| return 0; | ||
| } | ||
|
|
||
| static void __init qpace_setup_arch(void) | ||
| { | ||
| #ifdef CONFIG_SPU_BASE | ||
| spu_priv1_ops = &spu_priv1_mmio_ops; | ||
| spu_management_ops = &spu_management_of_ops; | ||
| #endif | ||
|
|
||
| cbe_regs_init(); | ||
|
|
||
| #ifdef CONFIG_CBE_RAS | ||
| cbe_ras_init(); | ||
| #endif | ||
|
|
||
| #ifdef CONFIG_SMP | ||
| smp_init_cell(); | ||
| #endif | ||
|
|
||
| /* init to some ~sane value until calibrate_delay() runs */ | ||
| loops_per_jiffy = 50000000; | ||
|
|
||
| cbe_pervasive_init(); | ||
| #ifdef CONFIG_DUMMY_CONSOLE | ||
| conswitchp = &dummy_con; | ||
| #endif | ||
|
|
||
| /* set notifier function */ | ||
| platform_notify = &qpace_notify; | ||
| } | ||
|
|
||
| static int __init qpace_probe(void) | ||
| { | ||
| unsigned long root = of_get_flat_dt_root(); | ||
|
|
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| if (!of_flat_dt_is_compatible(root, "IBM,QPACE")) | ||
| return 0; | ||
|
|
||
| hpte_init_native(); | ||
|
|
||
| return 1; | ||
| } | ||
|
|
||
| define_machine(qpace) { | ||
| .name = "QPACE", | ||
| .probe = qpace_probe, | ||
| .setup_arch = qpace_setup_arch, | ||
| .show_cpuinfo = qpace_show_cpuinfo, | ||
| .restart = rtas_restart, | ||
| .power_off = rtas_power_off, | ||
| .halt = rtas_halt, | ||
| .get_boot_time = rtas_get_boot_time, | ||
| .calibrate_decr = generic_calibrate_decr, | ||
| .progress = qpace_progress, | ||
| .init_IRQ = iic_init_IRQ, | ||
| #ifdef CONFIG_KEXEC | ||
| .machine_kexec = default_machine_kexec, | ||
| .machine_kexec_prepare = default_machine_kexec_prepare, | ||
| .machine_crash_shutdown = default_machine_crash_shutdown, | ||
| #endif | ||
| }; |
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