---

yaml
---
r: 272730
b: refs/heads/master
c: 4bcc475
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4bb73adec43bbf63d39e1c2021de0aab0c60ea34
+refs/heads/master: 4bcc475ebd06a04e1531254c27c6cf508ef8ebf9

trunk/arch/arm/mach-omap2/vc.c

@@ -46,7 +46,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
 		return -ENODATA;
 	}
 
-	if (!vdd->read_reg || !vdd->write_reg) {
+	if (!voltdm->read || !voltdm->write) {
 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 			__func__, voltdm->name);
 		return -EINVAL;
@@ -58,24 +58,22 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
 		volt_data = NULL;
 
 	*target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
-	*current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage);
+	*current_vsel = voltdm->read(vdd->vp_data->voltage);
 
 	/* Setting the ON voltage to the new target voltage */
-	vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg);
+	vc_cmdval = voltdm->read(vc->cmdval_reg);
 	vc_cmdval &= ~vc->common->cmd_on_mask;
 	vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
-	vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg);
+	voltdm->write(vc_cmdval, vc->cmdval_reg);
 
 	/* Setting vp errorgain based on the voltage */
 	if (volt_data) {
-		vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod,
-					       vdd->vp_data->vpconfig);
+		vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig);
 		vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain;
 		vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask;
 		vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain <<
 			vp_common->vpconfig_errorgain_shift;
-		vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod,
-			       vdd->vp_data->vpconfig);
+		voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig);
 	}
 
 	return 0;
@@ -120,11 +118,10 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
 			(vdd->pmic_info->i2c_slave_addr <<
 			vc->common->slaveaddr_shift);
 
-	vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg);
-	vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod,
-		       vc_bypass_val_reg);
+	voltdm->write(vc_bypass_value, vc_bypass_val_reg);
+	voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
 
-	vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg);
+	vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 	/*
 	 * Loop till the bypass command is acknowledged from the SMPS.
 	 * NOTE: This is legacy code. The loop count and retry count needs
@@ -143,8 +140,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
 			loop_cnt = 0;
 			udelay(10);
 		}
-		vc_bypass_value = vdd->read_reg(vc->common->prm_mod,
-						vc_bypass_val_reg);
+		vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 	}
 
 	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
@@ -153,18 +149,13 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
 
 static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
 {
-	struct omap_vc_channel *vc = voltdm->vc;
-	struct omap_vdd_info *vdd = voltdm->vdd;
-
 	/*
 	 * Voltage Manager FSM parameters init
 	 * XXX This data should be passed in from the board file
 	 */
-	vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET);
-	vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod,
-		       OMAP3_PRM_VOLTOFFSET_OFFSET);
-	vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod,
-		       OMAP3_PRM_VOLTSETUP2_OFFSET);
+	voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET);
+	voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET);
+	voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET);
 }
 
 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
@@ -187,16 +178,16 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 		(onlp_vsel << vc->common->cmd_onlp_shift) |
 		(ret_vsel << vc->common->cmd_ret_shift) |
 		(off_vsel << vc->common->cmd_off_shift));
-	vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg);
+	voltdm->write(vc_val, vc->cmdval_reg);
 
 	/*
 	 * Generic VC parameters init
 	 * XXX This data should be abstracted out
 	 */
-	vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod,
-			OMAP3_PRM_VC_CH_CONF_OFFSET);
-	vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod,
-			OMAP3_PRM_VC_I2C_CFG_OFFSET);
+	voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK,
+		       OMAP3_PRM_VC_CH_CONF_OFFSET);
+	voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK,
+		       OMAP3_PRM_VC_I2C_CFG_OFFSET);
 
 	omap3_vfsm_init(voltdm);
 
@@ -207,8 +198,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 /* OMAP4 specific voltage init functions */
 static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 {
-	struct omap_vc_channel *vc = voltdm->vc;
-	struct omap_vdd_info *vdd = voltdm->vdd;
 	static bool is_initialized;
 	u32 vc_val;
 
@@ -224,11 +213,11 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 	vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
 		  OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
 		  OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
-	vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
+	voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
 
 	/* XXX These are magic numbers and do not belong! */
 	vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
-	vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
+	voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
 
 	is_initialized = true;
 }
@@ -246,34 +235,30 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 		return;
 	}
 
-	if (!vdd->read_reg || !vdd->write_reg) {
+	if (!voltdm->read || !voltdm->write) {
 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 			__func__, voltdm->name);
 		return;
 	}
 
 	/* Set up the SMPS_SA(i2c slave address in VC */
-	vc_val = vdd->read_reg(vc->common->prm_mod,
-			       vc->common->smps_sa_reg);
+	vc_val = voltdm->read(vc->common->smps_sa_reg);
 	vc_val &= ~vc->smps_sa_mask;
 	vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift;
-	vdd->write_reg(vc_val, vc->common->prm_mod,
-		       vc->common->smps_sa_reg);
+	voltdm->write(vc_val, vc->common->smps_sa_reg);
 
 	/* Setup the VOLRA(pmic reg addr) in VC */
-	vc_val = vdd->read_reg(vc->common->prm_mod,
-			       vc->common->smps_volra_reg);
+	vc_val = voltdm->read(vc->common->smps_volra_reg);
 	vc_val &= ~vc->smps_volra_mask;
 	vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift;
-	vdd->write_reg(vc_val, vc->common->prm_mod,
-		       vc->common->smps_volra_reg);
+	voltdm->write(vc_val, vc->common->smps_volra_reg);
 
 	/* Configure the setup times */
-	vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg);
+	vc_val = voltdm->read(vdd->vfsm->voltsetup_reg);
 	vc_val &= ~vdd->vfsm->voltsetup_mask;
 	vc_val |= vdd->pmic_info->volt_setup_time <<
 			vdd->vfsm->voltsetup_shift;
-	vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg);
+	voltdm->write(vc_val, vdd->vfsm->voltsetup_reg);
 
 	if (cpu_is_omap34xx())
 		omap3_vc_init_channel(voltdm);

trunk/arch/arm/mach-omap2/vc.h

@@ -25,7 +25,6 @@ struct voltagedomain;
  * struct omap_vc_common - per-VC register/bitfield data
  * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
  * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
- * @prm_mod: PRM module id used for PRM register access
  * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
  * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
  * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
@@ -43,7 +42,6 @@ struct voltagedomain;
 struct omap_vc_common {
 	u32 cmd_on_mask;
 	u32 valid;
-	s16 prm_mod;
 	u8 smps_sa_reg;
 	u8 smps_volra_reg;
 	u8 bypass_val_reg;

trunk/arch/arm/mach-omap2/vc3xxx_data.c

@@ -30,7 +30,6 @@
  * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
  */
 static struct omap_vc_common omap3_vc_common = {
-	.prm_mod         = OMAP3430_GR_MOD,
 	.smps_sa_reg	 = OMAP3_PRM_VC_SMPS_SA_OFFSET,
 	.smps_volra_reg	 = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
 	.bypass_val_reg	 = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,

trunk/arch/arm/mach-omap2/vc44xx_data.c

@@ -31,7 +31,6 @@
  * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
  */
 static const struct omap_vc_common omap4_vc_common = {
-	.prm_mod = OMAP4430_PRM_DEVICE_INST,
 	.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
 	.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
 	.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,

trunk/arch/arm/mach-omap2/voltage.c

@@ -46,27 +46,6 @@ static LIST_HEAD(voltdm_list);
 #define VOLTAGE_DIR_SIZE	16
 static struct dentry *voltage_dir;
 
-static u32 omap3_voltage_read_reg(u16 mod, u8 offset)
-{
-	return omap2_prm_read_mod_reg(mod, offset);
-}
-
-static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset)
-{
-	omap2_prm_write_mod_reg(val, mod, offset);
-}
-
-static u32 omap4_voltage_read_reg(u16 mod, u8 offset)
-{
-	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
-					mod, offset);
-}
-
-static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset)
-{
-	omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset);
-}
-
 static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
 {
 	char *sys_ck_name;
@@ -183,15 +162,7 @@ static int __init omap_vdd_data_configure(struct voltagedomain *voltdm)
 	if (IS_ERR_VALUE(_config_common_vdd_data(voltdm)))
 		goto ovdc_out;
 
-	if (cpu_is_omap34xx()) {
-		vdd->read_reg = omap3_voltage_read_reg;
-		vdd->write_reg = omap3_voltage_write_reg;
-		ret = 0;
-	} else if (cpu_is_omap44xx()) {
-		vdd->read_reg = omap4_voltage_read_reg;
-		vdd->write_reg = omap4_voltage_write_reg;
-		ret = 0;
-	}
+	ret = 0;
 
 ovdc_out:
 	return ret;

trunk/arch/arm/mach-omap2/voltage.h

@@ -59,6 +59,9 @@ struct omap_vfsm_instance_data {
  * @node: list_head linking all voltage domains
  * @pwrdm_list: list_head linking all powerdomains in this voltagedomain
  * @vc: pointer to VC channel associated with this voltagedomain
+ * @read: read a VC/VP register
+ * @write: write a VC/VP register
+ * @read: read-modify-write a VC/VP register
  * @vdd: to be removed
  */
 struct voltagedomain {
@@ -68,6 +71,11 @@ struct voltagedomain {
 	struct list_head pwrdm_list;
 	struct omap_vc_channel *vc;
 
+	/* VC/VP register access functions: SoC specific */
+	u32 (*read) (u8 offset);
+	void (*write) (u32 val, u8 offset);
+	u32 (*rmw)(u32 mask, u32 bits, u8 offset);
+
 	struct omap_vdd_info *vdd;
 };
 
@@ -146,8 +154,6 @@ struct omap_vdd_info {
 	u32 curr_volt;
 	bool vp_enabled;
 
-	u32 (*read_reg) (u16 mod, u8 offset);
-	void (*write_reg) (u32 val, u16 mod, u8 offset);
 	int (*volt_scale) (struct voltagedomain *voltdm,
 		unsigned long target_volt);
 };

trunk/arch/arm/mach-omap2/voltagedomains3xxx_data.c

@@ -56,13 +56,19 @@ static struct omap_vdd_info omap3_vdd2_info = {
 static struct voltagedomain omap3_voltdm_mpu = {
 	.name = "mpu_iva",
 	.scalable = true,
+	.read = omap3_prm_vcvp_read,
+	.write = omap3_prm_vcvp_write,
+	.rmw = omap3_prm_vcvp_rmw,
 	.vc = &omap3_vc_mpu,
 	.vdd = &omap3_vdd1_info,
 };
 
 static struct voltagedomain omap3_voltdm_core = {
 	.name = "core",
 	.scalable = true,
+	.read = omap3_prm_vcvp_read,
+	.write = omap3_prm_vcvp_write,
+	.rmw = omap3_prm_vcvp_rmw,
 	.vc = &omap3_vc_core,
 	.vdd = &omap3_vdd2_info,
 };

trunk/arch/arm/mach-omap2/voltagedomains44xx_data.c

@@ -62,20 +62,29 @@ static struct omap_vdd_info omap4_vdd_core_info = {
 static struct voltagedomain omap4_voltdm_mpu = {
 	.name = "mpu",
 	.scalable = true,
+	.read = omap4_prm_vcvp_read,
+	.write = omap4_prm_vcvp_write,
+	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_mpu,
 	.vdd = &omap4_vdd_mpu_info,
 };
 
 static struct voltagedomain omap4_voltdm_iva = {
 	.name = "iva",
 	.scalable = true,
+	.read = omap4_prm_vcvp_read,
+	.write = omap4_prm_vcvp_write,
+	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_iva,
 	.vdd = &omap4_vdd_iva_info,
 };
 
 static struct voltagedomain omap4_voltdm_core = {
 	.name = "core",
 	.scalable = true,
+	.read = omap4_prm_vcvp_read,
+	.write = omap4_prm_vcvp_write,
+	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_core,
 	.vdd = &omap4_vdd_core_info,
 };