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ARM: S3C64XX: Correct reservation of GPIOs for CPU module on Cragganmore
The gpio_base for the PMIC on the CPU module was being incorrectly set to be the same as that for the CODEC causing the two GPIO drivers to collide. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Mark Brown
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Kukjin Kim
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Nov 8, 2011
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