---

yaml
---
r: 300302
b: refs/heads/master
c: 1ebfefc
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 36a1987cd891fa82d9981886c3abbbe82c428c0d
+refs/heads/master: 1ebfefcf37a6e308266a8d786e8cfea0a454058c

trunk/Documentation/feature-removal-schedule.txt

@@ -539,13 +539,3 @@ When:	3.6
 Why:	setitimer is not returning -EFAULT if user pointer is NULL. This
 	violates the spec.
 Who:	Sasikantha Babu <sasikanth.v19@gmail.com>
-
-----------------------------
-
-What:	V4L2_CID_HCENTER, V4L2_CID_VCENTER V4L2 controls
-When:	3.7
-Why:	The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated
-	for about 4 years and they are not used by any mainline driver.
-	There are newer controls (V4L2_CID_PAN*, V4L2_CID_TILT*) that provide
-	similar	functionality.
-Who:	Sylwester Nawrocki <sylvester.nawrocki@gmail.com>

trunk/arch/mn10300/kernel/smp.c

@@ -24,7 +24,6 @@
 #include <linux/sched.h>
 #include <linux/profile.h>
 #include <linux/smp.h>
-#include <linux/cpu.h>
 #include <asm/tlbflush.h>
 #include <asm/bitops.h>
 #include <asm/processor.h>
@@ -39,6 +38,7 @@
 #include "internal.h"
 
 #ifdef CONFIG_HOTPLUG_CPU
+#include <linux/cpu.h>
 #include <asm/cacheflush.h>
 
 static unsigned long sleep_mode[NR_CPUS];
@@ -874,13 +874,10 @@ static void __init smp_online(void)
 
 	cpu = smp_processor_id();
 
-	notify_cpu_starting(cpu);
+	local_irq_enable();
 
-	ipi_call_lock();
 	set_cpu_online(cpu, true);
-	ipi_call_unlock();
-
-	local_irq_enable();
+	smp_wmb();
 }
 
 /**

trunk/arch/parisc/kernel/smp.c

@@ -31,7 +31,6 @@
 #include <linux/delay.h>
 #include <linux/bitops.h>
 #include <linux/ftrace.h>
-#include <linux/cpu.h>
 
 #include <linux/atomic.h>
 #include <asm/current.h>
@@ -296,13 +295,8 @@ smp_cpu_init(int cpunum)
 
 		printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
 		machine_halt();
-	}
-
-	notify_cpu_starting(cpunum);
-
-	ipi_call_lock();
+	}  
 	set_cpu_online(cpunum, true);
-	ipi_call_unlock();
 
 	/* Initialise the idle task for this CPU */
 	atomic_inc(&init_mm.mm_count);

trunk/arch/powerpc/include/asm/kvm_book3s.h

@@ -81,13 +81,12 @@ struct kvmppc_vcpu_book3s {
 	u64 sdr1;
 	u64 hior;
 	u64 msr_mask;
+	u64 vsid_next;
 #ifdef CONFIG_PPC_BOOK3S_32
 	u32 vsid_pool[VSID_POOL_SIZE];
-	u32 vsid_next;
 #else
-	u64 proto_vsid_first;
-	u64 proto_vsid_max;
-	u64 proto_vsid_next;
+	u64 vsid_first;
+	u64 vsid_max;
 #endif
 	int context_id[SID_CONTEXTS];
 

trunk/arch/powerpc/kvm/book3s_64_mmu_host.c

@@ -194,14 +194,14 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
 	backwards_map = !backwards_map;
 
 	/* Uh-oh ... out of mappings. Let's flush! */
-	if (vcpu_book3s->proto_vsid_next == vcpu_book3s->proto_vsid_max) {
-		vcpu_book3s->proto_vsid_next = vcpu_book3s->proto_vsid_first;
+	if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) {
+		vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
 		memset(vcpu_book3s->sid_map, 0,
 		       sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
 		kvmppc_mmu_pte_flush(vcpu, 0, 0);
 		kvmppc_mmu_flush_segments(vcpu);
 	}
-	map->host_vsid = vsid_scramble(vcpu_book3s->proto_vsid_next++, 256M);
+	map->host_vsid = vcpu_book3s->vsid_next++;
 
 	map->guest_vsid = gvsid;
 	map->valid = true;
@@ -319,10 +319,9 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
 		return -1;
 	vcpu3s->context_id[0] = err;
 
-	vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1)
-				  << USER_ESID_BITS) - 1;
-	vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
-	vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
+	vcpu3s->vsid_max = ((vcpu3s->context_id[0] + 1) << USER_ESID_BITS) - 1;
+	vcpu3s->vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
+	vcpu3s->vsid_next = vcpu3s->vsid_first;
 
 	kvmppc_mmu_hpte_init(vcpu);
 

trunk/arch/powerpc/kvm/book3s_hv_rm_mmu.c

@@ -463,7 +463,6 @@ long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)
 				/* insert R and C bits from PTE */
 				rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C);
 				args[j] |= rcbits << (56 - 5);
-				hp[0] = 0;
 				continue;
 			}
 

trunk/arch/powerpc/kvm/book3s_segment.S

@@ -197,8 +197,7 @@ kvmppc_interrupt:
 	/* Save guest PC and MSR */
 #ifdef CONFIG_PPC64
 BEGIN_FTR_SECTION
-	andi.	r0, r12, 0x2
-	cmpwi	cr1, r0, 0
+	andi.	r0,r12,0x2
 	beq	1f
 	mfspr	r3,SPRN_HSRR0
 	mfspr	r4,SPRN_HSRR1
@@ -251,12 +250,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
 	beq	ld_last_prev_inst
 	cmpwi	r12, BOOK3S_INTERRUPT_ALIGNMENT
 	beq-	ld_last_inst
-#ifdef CONFIG_PPC64
-BEGIN_FTR_SECTION
-	cmpwi	r12, BOOK3S_INTERRUPT_H_EMUL_ASSIST
-	beq-	ld_last_inst
-END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
-#endif
 
 	b	no_ld_last_inst
 
@@ -323,17 +316,23 @@ no_dcbz32_off:
 	 * Having set up SRR0/1 with the address where we want
 	 * to continue with relocation on (potentially in module
 	 * space), we either just go straight there with rfi[d],
-	 * or we jump to an interrupt handler if there is an
-	 * interrupt to be handled first.  In the latter case,
-	 * the rfi[d] at the end of the interrupt handler will
-	 * get us back to where we want to continue.
+	 * or we jump to an interrupt handler with bctr if there
+	 * is an interrupt to be handled first.  In the latter
+	 * case, the rfi[d] at the end of the interrupt handler
+	 * will get us back to where we want to continue.
 	 */
 
+	cmpwi	r12, BOOK3S_INTERRUPT_EXTERNAL
+	beq	1f
+	cmpwi	r12, BOOK3S_INTERRUPT_DECREMENTER
+	beq	1f
+	cmpwi	r12, BOOK3S_INTERRUPT_PERFMON
+1:	mtctr	r12
+
 	/* Register usage at this point:
 	 *
 	 * R1       = host R1
 	 * R2       = host R2
-	 * R10      = raw exit handler id
 	 * R12      = exit handler id
 	 * R13      = shadow vcpu (32-bit) or PACA (64-bit)
 	 * SVCPU.*  = guest *
@@ -343,25 +342,12 @@ no_dcbz32_off:
 	PPC_LL	r6, HSTATE_HOST_MSR(r13)
 	PPC_LL	r8, HSTATE_VMHANDLER(r13)
 
-#ifdef CONFIG_PPC64
-BEGIN_FTR_SECTION
-	beq	cr1, 1f
-	mtspr	SPRN_HSRR1, r6
-	mtspr	SPRN_HSRR0, r8
-END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
-#endif
-1:	/* Restore host msr -> SRR1 */
+	/* Restore host msr -> SRR1 */
 	mtsrr1	r6
 	/* Load highmem handler address */
 	mtsrr0	r8
 
 	/* RFI into the highmem handler, or jump to interrupt handler */
-	cmpwi	r12, BOOK3S_INTERRUPT_EXTERNAL
-	beqa	BOOK3S_INTERRUPT_EXTERNAL
-	cmpwi	r12, BOOK3S_INTERRUPT_DECREMENTER
-	beqa	BOOK3S_INTERRUPT_DECREMENTER
-	cmpwi	r12, BOOK3S_INTERRUPT_PERFMON
-	beqa	BOOK3S_INTERRUPT_PERFMON
-
+	beqctr
 	RFI
 kvmppc_handler_trampoline_exit_end:

trunk/arch/tile/include/asm/thread_info.h

@@ -100,14 +100,9 @@ extern void cpu_idle_on_new_stack(struct thread_info *old_ti,
 
 #else /* __ASSEMBLY__ */
 
-/*
- * How to get the thread information struct from assembly.
- * Note that we use different macros since different architectures
- * have different semantics in their "mm" instruction and we would
- * like to guarantee that the macro expands to exactly one instruction.
- */
+/* how to get the thread information struct from ASM */
 #ifdef __tilegx__
-#define EXTRACT_THREAD_INFO(reg) mm reg, zero, LOG2_THREAD_SIZE, 63
+#define GET_THREAD_INFO(reg) move reg, sp; mm reg, zero, LOG2_THREAD_SIZE, 63
 #else
 #define GET_THREAD_INFO(reg) mm reg, sp, zero, LOG2_THREAD_SIZE, 31
 #endif

trunk/arch/tile/kernel/compat_signal.c

@@ -403,17 +403,19 @@ int compat_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 	 * Set up registers for signal handler.
 	 * Registers that we don't modify keep the value they had from
 	 * user-space at the time we took the signal.
-	 * We always pass siginfo and mcontext, regardless of SA_SIGINFO,
-	 * since some things rely on this (e.g. glibc's debug/segfault.c).
 	 */
 	regs->pc = ptr_to_compat_reg(ka->sa.sa_handler);
 	regs->ex1 = PL_ICS_EX1(USER_PL, 1); /* set crit sec in handler */
 	regs->sp = ptr_to_compat_reg(frame);
 	regs->lr = restorer;
 	regs->regs[0] = (unsigned long) usig;
-	regs->regs[1] = ptr_to_compat_reg(&frame->info);
-	regs->regs[2] = ptr_to_compat_reg(&frame->uc);
-	regs->flags |= PT_FLAGS_CALLER_SAVES;
+
+	if (ka->sa.sa_flags & SA_SIGINFO) {
+		/* Need extra arguments, so mark to restore caller-saves. */
+		regs->regs[1] = ptr_to_compat_reg(&frame->info);
+		regs->regs[2] = ptr_to_compat_reg(&frame->uc);
+		regs->flags |= PT_FLAGS_CALLER_SAVES;
+	}
 
 	/*
 	 * Notify any tracer that was single-stepping it.

trunk/arch/tile/kernel/intvec_32.S

@@ -838,18 +838,6 @@ STD_ENTRY(interrupt_return)
 .Lresume_userspace:
 	FEEDBACK_REENTER(interrupt_return)
 
-	/*
-	 * Use r33 to hold whether we have already loaded the callee-saves
-	 * into ptregs.  We don't want to do it twice in this loop, since
-	 * then we'd clobber whatever changes are made by ptrace, etc.
-	 * Get base of stack in r32.
-	 */
-	{
-	 GET_THREAD_INFO(r32)
-	 movei  r33, 0
-	}
-
-.Lretry_work_pending:
 	/*
 	 * Disable interrupts so as to make sure we don't
 	 * miss an interrupt that sets any of the thread flags (like
@@ -860,6 +848,9 @@ STD_ENTRY(interrupt_return)
 	IRQ_DISABLE(r20, r21)
 	TRACE_IRQS_OFF  /* Note: clobbers registers r0-r29 */
 
+	/* Get base of stack in r32; note r30/31 are used as arguments here. */
+	GET_THREAD_INFO(r32)
+
 
 	/* Check to see if there is any work to do before returning to user. */
 	{
@@ -875,18 +866,16 @@ STD_ENTRY(interrupt_return)
 
 	/*
 	 * Make sure we have all the registers saved for signal
-	 * handling, notify-resume, or single-step.  Call out to C
-	 * code to figure out exactly what we need to do for each flag bit,
-	 * then if necessary, reload the flags and recheck.
+	 * handling or single-step.  Call out to C code to figure out
+	 * exactly what we need to do for each flag bit, then if
+	 * necessary, reload the flags and recheck.
 	 */
+	push_extra_callee_saves r0
 	{
 	 PTREGS_PTR(r0, PTREGS_OFFSET_BASE)
-	 bnz    r33, 1f
+	 jal    do_work_pending
 	}
-	push_extra_callee_saves r0
-	movei   r33, 1
-1:	jal     do_work_pending
-	bnz     r0, .Lretry_work_pending
+	bnz     r0, .Lresume_userspace
 
 	/*
 	 * In the NMI case we
@@ -1191,12 +1180,10 @@ handle_syscall:
 	add     r20, r20, tp
 	lw      r21, r20
 	addi    r21, r21, 1
-	{
-	 sw     r20, r21
-	 GET_THREAD_INFO(r31)
-	}
+	sw      r20, r21
 
 	/* Trace syscalls, if requested. */
+	GET_THREAD_INFO(r31)
 	addi	r31, r31, THREAD_INFO_FLAGS_OFFSET
 	lw	r30, r31
 	andi    r30, r30, _TIF_SYSCALL_TRACE
@@ -1375,17 +1362,15 @@ handle_ill:
 3:
 	/* set PC and continue */
 	lw      r26, r24
-	{
-	 sw     r28, r26
-	 GET_THREAD_INFO(r0)
-	}
+	sw      r28, r26
 
 	/*
 	 * Clear TIF_SINGLESTEP to prevent recursion if we execute an ill.
 	 * The normal non-arch flow redundantly clears TIF_SINGLESTEP, but we
 	 * need to clear it here and can't really impose on all other arches.
 	 * So what's another write between friends?
 	 */
+	GET_THREAD_INFO(r0)
 
 	addi    r1, r0, THREAD_INFO_FLAGS_OFFSET
 	{