---

yaml
---
r: 234783
b: refs/heads/master
c: 1a0e62a
h: refs/heads/master
i:
  234781: ac808e0
  234779: 247c7d7
  234775: b5bac27
  234767: b11eeae
  234751: 5f788bb
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 08221110e88ae101acf2464154f98e6d1b1ab21c
+refs/heads/master: 1a0e62a49ad417712cfa79a395f6c39f67aadb44

trunk/arch/x86/kernel/apic/io_apic.c

@@ -1240,7 +1240,8 @@ static inline int IO_APIC_irq_trigger(int irq)
 }
 #endif
 
-static void ioapic_register_intr(unsigned int irq, unsigned long trigger)
+static void ioapic_register_intr(unsigned int irq, struct irq_cfg *cfg,
+				 unsigned long trigger)
 {
 	struct irq_chip *chip = &ioapic_chip;
 	irq_flow_handler_t hdl;
@@ -1255,7 +1256,7 @@ static void ioapic_register_intr(unsigned int irq, unsigned long trigger)
 		fasteoi = false;
 	}
 
-	if (irq_remapped(irq_get_chip_data(irq))) {
+	if (irq_remapped(cfg)) {
 		irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
 		chip = &ir_ioapic_chip;
 		fasteoi = trigger != 0;
@@ -1361,7 +1362,7 @@ static void setup_ioapic_irq(int apic_id, int pin, unsigned int irq,
 		return;
 	}
 
-	ioapic_register_intr(irq, trigger);
+	ioapic_register_intr(irq, cfg, trigger);
 	if (irq < legacy_pic->nr_legacy_irqs)
 		legacy_pic->mask(irq);
 
@@ -3088,7 +3089,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq,
 
 	dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
 
-	if (irq_remapped(irq_get_chip_data(irq))) {
+	if (irq_remapped(cfg)) {
 		struct irte irte;
 		int ir_index;
 		u16 sub_handle;