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ARM: S5P: Add SROM control register shift macros for other banks.
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This patch adds shift macros for the SROM Bus width and control
register to represent the shift count for the 5th and 6th SROM
banks.  Some of the S5P SOCs have them.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Thomas Abraham authored and Kukjin Kim committed Dec 30, 2010
1 parent 8cf460a commit abc6c36
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2 changes: 2 additions & 0 deletions arch/arm/plat-s5p/include/plat/regs-srom.h
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Expand Up @@ -36,6 +36,8 @@
#define S5P_SROM_BW__NCS1__SHIFT 4
#define S5P_SROM_BW__NCS2__SHIFT 8
#define S5P_SROM_BW__NCS3__SHIFT 12
#define S5P_SROM_BW__NCS4__SHIFT 16
#define S5P_SROM_BW__NCS5__SHIFT 20

/* applies to same to BCS0 - BCS3 */

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