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Merge tag 'omap-for-v3.13/am43xx-hwmod-signed' of git://git.kernel.or…
…g/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc From Tony Lindgren: Changes needed for am43xx for the hwmod data. This will be the last new set of hwmod data for any SoC as future SoCs will use a driver and device tree based approach. But before that can be dealt with, we need to first sort out the pending driver/clk issues. Queued by Paul Walmsley <paul@pwsan.com>: Add hwmod and PRCM data for the TI AM43xx family of SoCs. Under normal circumstances, these patches would not be merged. The hwmod and PRCM data should be moved out either to DT data or to drivers/. Also, the current implementation trades off lines of diff by dynamically rewriting static data at runtime, which is a bad practice - it causes future maintenance headaches. However, after speaking with my upstream, it sounds like it's better to merge these patches in their current state, due to long term considerations. Basic test logs are here: http://www.pwsan.com/omap/testlogs/am43xx_support_v3.13/20131015213706/ Due to the lack of an AM43xx board and any available public documentation, it's impossible for me to review or test that platform in any meaningful way. But at least the tests above verify that the patches don't affect existing platforms - particularly AM33xx. * tag 'omap-for-v3.13/am43xx-hwmod-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2: hwmod: Add qspi data for am437x. ARM: OMAP2+: hwmod: Add USB hwmod data for AM437x. ARM: OMAP2+: AM43x PRCM init ARM: OMAP2+: AM43x: PRCM kbuild ARM: OMAP2+: hwmod: AM43x operations ARM: OMAP2+: hwmod: AM43x support ARM: OMAP2+: CM: AM43x clockdomain data ARM: OMAP2+: PM: AM43x powerdomain data ARM: OMAP2+: PRCM: AM43x definitions ARM: OMAP2+: hwmod: AM335x: remove static register offs ARM: OMAP2+: hwmod: AM335x: runtime register update ARM: OMAP2+: hwmod: AM335x/AM43x: move common data ARM: OMAP2+: CM: cm_inst offset s16->u16 Signed-off-by: Kevin Hilman <khilman@linaro.org>
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| /* | ||
| * AM43xx Clock domains framework | ||
| * | ||
| * Copyright (C) 2013 Texas Instruments, Inc. | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License version 2 as | ||
| * published by the Free Software Foundation. | ||
| */ | ||
|
|
||
| #include <linux/kernel.h> | ||
| #include <linux/io.h> | ||
|
|
||
| #include "clockdomain.h" | ||
| #include "prcm44xx.h" | ||
| #include "prcm43xx.h" | ||
|
|
||
| static struct clockdomain l4_cefuse_43xx_clkdm = { | ||
| .name = "l4_cefuse_clkdm", | ||
| .pwrdm = { .name = "cefuse_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_CEFUSE_INST, | ||
| .clkdm_offs = AM43XX_CM_CEFUSE_CEFUSE_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain mpu_43xx_clkdm = { | ||
| .name = "mpu_clkdm", | ||
| .pwrdm = { .name = "mpu_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_MPU_INST, | ||
| .clkdm_offs = AM43XX_CM_MPU_MPU_CDOFFS, | ||
| .flags = CLKDM_CAN_HWSUP_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain l4ls_43xx_clkdm = { | ||
| .name = "l4ls_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_L4LS_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain tamper_43xx_clkdm = { | ||
| .name = "tamper_clkdm", | ||
| .pwrdm = { .name = "tamper_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_TAMPER_INST, | ||
| .clkdm_offs = AM43XX_CM_TAMPER_TAMPER_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain l4_rtc_43xx_clkdm = { | ||
| .name = "l4_rtc_clkdm", | ||
| .pwrdm = { .name = "rtc_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_RTC_INST, | ||
| .clkdm_offs = AM43XX_CM_RTC_RTC_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain pruss_ocp_43xx_clkdm = { | ||
| .name = "pruss_ocp_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_ICSS_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain ocpwp_l3_43xx_clkdm = { | ||
| .name = "ocpwp_l3_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_OCPWP_L3_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain l3s_tsc_43xx_clkdm = { | ||
| .name = "l3s_tsc_clkdm", | ||
| .pwrdm = { .name = "wkup_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_WKUP_INST, | ||
| .clkdm_offs = AM43XX_CM_WKUP_L3S_TSC_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain dss_43xx_clkdm = { | ||
| .name = "dss_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_DSS_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain l3_aon_43xx_clkdm = { | ||
| .name = "l3_aon_clkdm", | ||
| .pwrdm = { .name = "wkup_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_WKUP_INST, | ||
| .clkdm_offs = AM43XX_CM_WKUP_L3_AON_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain emif_43xx_clkdm = { | ||
| .name = "emif_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_EMIF_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain l4_wkup_aon_43xx_clkdm = { | ||
| .name = "l4_wkup_aon_clkdm", | ||
| .pwrdm = { .name = "wkup_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_WKUP_INST, | ||
| .clkdm_offs = AM43XX_CM_WKUP_L4_WKUP_AON_CDOFFS, | ||
| }; | ||
|
|
||
| static struct clockdomain l3_43xx_clkdm = { | ||
| .name = "l3_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_L3_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain l4_wkup_43xx_clkdm = { | ||
| .name = "l4_wkup_clkdm", | ||
| .pwrdm = { .name = "wkup_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_WKUP_INST, | ||
| .clkdm_offs = AM43XX_CM_WKUP_WKUP_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain cpsw_125mhz_43xx_clkdm = { | ||
| .name = "cpsw_125mhz_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_CPSW_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain gfx_l3_43xx_clkdm = { | ||
| .name = "gfx_l3_clkdm", | ||
| .pwrdm = { .name = "gfx_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_GFX_INST, | ||
| .clkdm_offs = AM43XX_CM_GFX_GFX_L3_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain l3s_43xx_clkdm = { | ||
| .name = "l3s_clkdm", | ||
| .pwrdm = { .name = "per_pwrdm" }, | ||
| .prcm_partition = AM43XX_CM_PARTITION, | ||
| .cm_inst = AM43XX_CM_PER_INST, | ||
| .clkdm_offs = AM43XX_CM_PER_L3S_CDOFFS, | ||
| .flags = CLKDM_CAN_SWSUP, | ||
| }; | ||
|
|
||
| static struct clockdomain *clockdomains_am43xx[] __initdata = { | ||
| &l4_cefuse_43xx_clkdm, | ||
| &mpu_43xx_clkdm, | ||
| &l4ls_43xx_clkdm, | ||
| &tamper_43xx_clkdm, | ||
| &l4_rtc_43xx_clkdm, | ||
| &pruss_ocp_43xx_clkdm, | ||
| &ocpwp_l3_43xx_clkdm, | ||
| &l3s_tsc_43xx_clkdm, | ||
| &dss_43xx_clkdm, | ||
| &l3_aon_43xx_clkdm, | ||
| &emif_43xx_clkdm, | ||
| &l4_wkup_aon_43xx_clkdm, | ||
| &l3_43xx_clkdm, | ||
| &l4_wkup_43xx_clkdm, | ||
| &cpsw_125mhz_43xx_clkdm, | ||
| &gfx_l3_43xx_clkdm, | ||
| &l3s_43xx_clkdm, | ||
| NULL | ||
| }; | ||
|
|
||
| void __init am43xx_clockdomains_init(void) | ||
| { | ||
| clkdm_register_platform_funcs(&am43xx_clkdm_operations); | ||
| clkdm_register_clkdms(clockdomains_am43xx); | ||
| clkdm_complete_init(); | ||
| } |
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