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ARC: [plat-arcfpga]: Enabling DeviceTree for Angel4 board
* arc-uart platform device now populated dynamically, using of_platform_populate() - applies to any other device whatsoever. * uart in turn requires incore arc-intc to be also present in DT * A irq-domain needs to be instantiated for IRQ requests by DT probed device (e.g. arc-uart) TODO: switch over to linear irq domain once all devs have been transitioned to DT Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Arnd Bergmann <arnd@arndb.de>
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Vineet Gupta
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Feb 15, 2013
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* ARC700 incore Interrupt Controller | ||
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The core interrupt controller provides 32 prioritised interrupts (2 levels) | ||
to ARC700 core. | ||
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Properties: | ||
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- compatible: "snps,arc700-intc" | ||
- interrupt-controller: This is an interrupt controller. | ||
- #interrupt-cells: Must be <1>. | ||
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Single Cell "interrupts" property of a device specifies the IRQ number | ||
between 0 to 31 | ||
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intc accessed via the special ARC AUX register interface, hence "reg" property | ||
is not specified. | ||
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Example: | ||
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intc: interrupt-controller { | ||
compatible = "snps,arc700-intc"; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; |
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/* | ||
* Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
/dts-v1/; | ||
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/include/ "skeleton.dtsi" | ||
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/ { | ||
compatible = "snps,arc-angel4"; | ||
clock-frequency = <80000000>; /* 80 MHZ */ | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
interrupt-parent = <&intc>; | ||
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chosen { | ||
bootargs = "console=ttyARC0,115200n8"; | ||
}; | ||
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aliases { | ||
serial0 = &arcuart0; | ||
}; | ||
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memory { | ||
device_type = "memory"; | ||
reg = <0x00000000 0x10000000>; /* 256M */ | ||
}; | ||
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fpga { | ||
compatible = "simple-bus"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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/* child and parent address space 1:1 mapped */ | ||
ranges; | ||
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intc: interrupt-controller { | ||
compatible = "snps,arc700-intc"; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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arcuart0: serial@c0fc1000 { | ||
compatible = "snps,arc-uart"; | ||
reg = <0xc0fc1000 0x100>; | ||
interrupts = <5>; | ||
clock-frequency = <80000000>; | ||
baud = <115200>; | ||
status = "okay"; | ||
}; | ||
}; | ||
}; |
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