---

yaml --- r: 146813 b: refs/heads/master c: b7e2ac6 h: refs/heads/master i: 146811: af8eae2 v: v3
git-mirror · May 26, 2009 · adac9ce · adac9ce
1 parent c9806d6
commit adac9ce
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Showing 2 changed files with 19 additions and 3 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d076d2bd0d9379314df5f2ab8b9c83f617c70923
+refs/heads/master: b7e2ac619465f1774b827d9997109ceef4a61851
diff --git a/trunk/arch/sh/include/asm/pci.h b/trunk/arch/sh/include/asm/pci.h
@@ -89,12 +89,28 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
 #endif
 
 #ifdef CONFIG_PCI
+/*
+ * None of the SH PCI controllers support MWI, it is always treated as a
+ * direct memory write.
+ */
+#define PCI_DISABLE_MWI
+
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 					enum pci_dma_burst_strategy *strat,
 					unsigned long *strategy_parameter)
 {
-	*strat = PCI_DMA_BURST_INFINITY;
-	*strategy_parameter = ~0UL;
+	unsigned long cacheline_size;
+	u8 byte;
+
+	pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
+
+	if (byte == 0)
+		cacheline_size = L1_CACHE_BYTES;
+	else
+		cacheline_size = byte << 2;
+
+	*strat = PCI_DMA_BURST_MULTIPLE;
+	*strategy_parameter = cacheline_size;
 }
 #endif