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[BNX2]: Re-organize firmware structures.
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Re-organize the firmware handling code and declarations a bit to make
the code more compact.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Michael Chan authored and David S. Miller committed Dec 3, 2006
1 parent a16dda0 commit af3ee51
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Showing 3 changed files with 187 additions and 218 deletions.
164 changes: 25 additions & 139 deletions drivers/net/bnx2.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2214,11 +2214,12 @@ load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len,
}
}

static void
static int
load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
{
u32 offset;
u32 val;
int rc;

/* Halt the CPU. */
val = REG_RD_IND(bp, cpu_reg->mode);
Expand All @@ -2228,7 +2229,18 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)

/* Load the Text area. */
offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);
if (fw->text) {
if (fw->gz_text) {
u32 text_len;
void *text;

rc = bnx2_gunzip(bp, fw->gz_text, fw->gz_text_len, &text,
&text_len);
if (rc)
return rc;

fw->text = text;
}
if (fw->gz_text) {
int j;

for (j = 0; j < (fw->text_len / 4); j++, offset += 4) {
Expand Down Expand Up @@ -2286,13 +2298,15 @@ load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
val &= ~cpu_reg->mode_value_halt;
REG_WR_IND(bp, cpu_reg->state, cpu_reg->state_value_clear);
REG_WR_IND(bp, cpu_reg->mode, val);

return 0;
}

static int
bnx2_init_cpus(struct bnx2 *bp)
{
struct cpu_reg cpu_reg;
struct fw_info fw;
struct fw_info *fw;
int rc = 0;
void *text;
u32 text_len;
Expand Down Expand Up @@ -2329,44 +2343,12 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_RXP_SCRATCH;
cpu_reg.mips_view_base = 0x8000000;

fw.ver_major = bnx2_RXP_b06FwReleaseMajor;
fw.ver_minor = bnx2_RXP_b06FwReleaseMinor;
fw.ver_fix = bnx2_RXP_b06FwReleaseFix;
fw.start_addr = bnx2_RXP_b06FwStartAddr;
fw = &bnx2_rxp_fw_06;

fw.text_addr = bnx2_RXP_b06FwTextAddr;
fw.text_len = bnx2_RXP_b06FwTextLen;
fw.text_index = 0;

rc = bnx2_gunzip(bp, bnx2_RXP_b06FwText, sizeof(bnx2_RXP_b06FwText),
&text, &text_len);
rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc)
goto init_cpu_err;

fw.text = text;

fw.data_addr = bnx2_RXP_b06FwDataAddr;
fw.data_len = bnx2_RXP_b06FwDataLen;
fw.data_index = 0;
fw.data = bnx2_RXP_b06FwData;

fw.sbss_addr = bnx2_RXP_b06FwSbssAddr;
fw.sbss_len = bnx2_RXP_b06FwSbssLen;
fw.sbss_index = 0;
fw.sbss = bnx2_RXP_b06FwSbss;

fw.bss_addr = bnx2_RXP_b06FwBssAddr;
fw.bss_len = bnx2_RXP_b06FwBssLen;
fw.bss_index = 0;
fw.bss = bnx2_RXP_b06FwBss;

fw.rodata_addr = bnx2_RXP_b06FwRodataAddr;
fw.rodata_len = bnx2_RXP_b06FwRodataLen;
fw.rodata_index = 0;
fw.rodata = bnx2_RXP_b06FwRodata;

load_cpu_fw(bp, &cpu_reg, &fw);

/* Initialize the TX Processor. */
cpu_reg.mode = BNX2_TXP_CPU_MODE;
cpu_reg.mode_value_halt = BNX2_TXP_CPU_MODE_SOFT_HALT;
Expand All @@ -2381,44 +2363,12 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_TXP_SCRATCH;
cpu_reg.mips_view_base = 0x8000000;

fw.ver_major = bnx2_TXP_b06FwReleaseMajor;
fw.ver_minor = bnx2_TXP_b06FwReleaseMinor;
fw.ver_fix = bnx2_TXP_b06FwReleaseFix;
fw.start_addr = bnx2_TXP_b06FwStartAddr;
fw = &bnx2_txp_fw_06;

fw.text_addr = bnx2_TXP_b06FwTextAddr;
fw.text_len = bnx2_TXP_b06FwTextLen;
fw.text_index = 0;

rc = bnx2_gunzip(bp, bnx2_TXP_b06FwText, sizeof(bnx2_TXP_b06FwText),
&text, &text_len);
rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc)
goto init_cpu_err;

fw.text = text;

fw.data_addr = bnx2_TXP_b06FwDataAddr;
fw.data_len = bnx2_TXP_b06FwDataLen;
fw.data_index = 0;
fw.data = bnx2_TXP_b06FwData;

fw.sbss_addr = bnx2_TXP_b06FwSbssAddr;
fw.sbss_len = bnx2_TXP_b06FwSbssLen;
fw.sbss_index = 0;
fw.sbss = bnx2_TXP_b06FwSbss;

fw.bss_addr = bnx2_TXP_b06FwBssAddr;
fw.bss_len = bnx2_TXP_b06FwBssLen;
fw.bss_index = 0;
fw.bss = bnx2_TXP_b06FwBss;

fw.rodata_addr = bnx2_TXP_b06FwRodataAddr;
fw.rodata_len = bnx2_TXP_b06FwRodataLen;
fw.rodata_index = 0;
fw.rodata = bnx2_TXP_b06FwRodata;

load_cpu_fw(bp, &cpu_reg, &fw);

/* Initialize the TX Patch-up Processor. */
cpu_reg.mode = BNX2_TPAT_CPU_MODE;
cpu_reg.mode_value_halt = BNX2_TPAT_CPU_MODE_SOFT_HALT;
Expand All @@ -2433,44 +2383,12 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_TPAT_SCRATCH;
cpu_reg.mips_view_base = 0x8000000;

fw.ver_major = bnx2_TPAT_b06FwReleaseMajor;
fw.ver_minor = bnx2_TPAT_b06FwReleaseMinor;
fw.ver_fix = bnx2_TPAT_b06FwReleaseFix;
fw.start_addr = bnx2_TPAT_b06FwStartAddr;
fw = &bnx2_tpat_fw_06;

fw.text_addr = bnx2_TPAT_b06FwTextAddr;
fw.text_len = bnx2_TPAT_b06FwTextLen;
fw.text_index = 0;

rc = bnx2_gunzip(bp, bnx2_TPAT_b06FwText, sizeof(bnx2_TPAT_b06FwText),
&text, &text_len);
rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc)
goto init_cpu_err;

fw.text = text;

fw.data_addr = bnx2_TPAT_b06FwDataAddr;
fw.data_len = bnx2_TPAT_b06FwDataLen;
fw.data_index = 0;
fw.data = bnx2_TPAT_b06FwData;

fw.sbss_addr = bnx2_TPAT_b06FwSbssAddr;
fw.sbss_len = bnx2_TPAT_b06FwSbssLen;
fw.sbss_index = 0;
fw.sbss = bnx2_TPAT_b06FwSbss;

fw.bss_addr = bnx2_TPAT_b06FwBssAddr;
fw.bss_len = bnx2_TPAT_b06FwBssLen;
fw.bss_index = 0;
fw.bss = bnx2_TPAT_b06FwBss;

fw.rodata_addr = bnx2_TPAT_b06FwRodataAddr;
fw.rodata_len = bnx2_TPAT_b06FwRodataLen;
fw.rodata_index = 0;
fw.rodata = bnx2_TPAT_b06FwRodata;

load_cpu_fw(bp, &cpu_reg, &fw);

/* Initialize the Completion Processor. */
cpu_reg.mode = BNX2_COM_CPU_MODE;
cpu_reg.mode_value_halt = BNX2_COM_CPU_MODE_SOFT_HALT;
Expand All @@ -2485,44 +2403,12 @@ bnx2_init_cpus(struct bnx2 *bp)
cpu_reg.spad_base = BNX2_COM_SCRATCH;
cpu_reg.mips_view_base = 0x8000000;

fw.ver_major = bnx2_COM_b06FwReleaseMajor;
fw.ver_minor = bnx2_COM_b06FwReleaseMinor;
fw.ver_fix = bnx2_COM_b06FwReleaseFix;
fw.start_addr = bnx2_COM_b06FwStartAddr;

fw.text_addr = bnx2_COM_b06FwTextAddr;
fw.text_len = bnx2_COM_b06FwTextLen;
fw.text_index = 0;
fw = &bnx2_com_fw_06;

rc = bnx2_gunzip(bp, bnx2_COM_b06FwText, sizeof(bnx2_COM_b06FwText),
&text, &text_len);
rc = load_cpu_fw(bp, &cpu_reg, fw);
if (rc)
goto init_cpu_err;

fw.text = text;

fw.data_addr = bnx2_COM_b06FwDataAddr;
fw.data_len = bnx2_COM_b06FwDataLen;
fw.data_index = 0;
fw.data = bnx2_COM_b06FwData;

fw.sbss_addr = bnx2_COM_b06FwSbssAddr;
fw.sbss_len = bnx2_COM_b06FwSbssLen;
fw.sbss_index = 0;
fw.sbss = bnx2_COM_b06FwSbss;

fw.bss_addr = bnx2_COM_b06FwBssAddr;
fw.bss_len = bnx2_COM_b06FwBssLen;
fw.bss_index = 0;
fw.bss = bnx2_COM_b06FwBss;

fw.rodata_addr = bnx2_COM_b06FwRodataAddr;
fw.rodata_len = bnx2_COM_b06FwRodataLen;
fw.rodata_index = 0;
fw.rodata = bnx2_COM_b06FwRodata;

load_cpu_fw(bp, &cpu_reg, &fw);

init_cpu_err:
bnx2_gunzip_end(bp);
return rc;
Expand Down
48 changes: 25 additions & 23 deletions drivers/net/bnx2.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4107,41 +4107,43 @@ struct cpu_reg {
};

struct fw_info {
u32 ver_major;
u32 ver_minor;
u32 ver_fix;
const u32 ver_major;
const u32 ver_minor;
const u32 ver_fix;

u32 start_addr;
const u32 start_addr;

/* Text section. */
u32 text_addr;
u32 text_len;
u32 text_index;
const u32 text_addr;
const u32 text_len;
const u32 text_index;
u32 *text;
u8 *gz_text;
const u32 gz_text_len;

/* Data section. */
u32 data_addr;
u32 data_len;
u32 data_index;
u32 *data;
const u32 data_addr;
const u32 data_len;
const u32 data_index;
const u32 *data;

/* SBSS section. */
u32 sbss_addr;
u32 sbss_len;
u32 sbss_index;
u32 *sbss;
const u32 sbss_addr;
const u32 sbss_len;
const u32 sbss_index;
const u32 *sbss;

/* BSS section. */
u32 bss_addr;
u32 bss_len;
u32 bss_index;
u32 *bss;
const u32 bss_addr;
const u32 bss_len;
const u32 bss_index;
const u32 *bss;

/* Read-only section. */
u32 rodata_addr;
u32 rodata_len;
u32 rodata_index;
u32 *rodata;
const u32 rodata_addr;
const u32 rodata_len;
const u32 rodata_index;
const u32 *rodata;
};

#define RV2P_PROC1 0
Expand Down
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