---

yaml
---
r: 117728
b: refs/heads/master
c: b8a16e1
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1637de0c9b4dbac0f185e94b2b8cd2c2db78700d
+refs/heads/master: b8a16e1fdfe9caed734df0e157ad74ae2b13e3bd

trunk/arch/arm/mach-msm/Makefile

@@ -1,4 +1,5 @@
 obj-y += io.o idle.o irq.o timer.o dma.o
+obj-y += proc_comm.o
 
 # Common code for board init
 obj-y += common.o

trunk/arch/arm/mach-msm/proc_comm.c

@@ -0,0 +1,110 @@
+/* arch/arm/mach-msm/proc_comm.c
+ *
+ * Copyright (C) 2007-2008 Google, Inc.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <mach/msm_iomap.h>
+#include <mach/system.h>
+
+#include "proc_comm.h"
+
+#define MSM_A2M_INT(n) (MSM_CSR_BASE + 0x400 + (n) * 4)
+
+static inline void notify_other_proc_comm(void)
+{
+	writel(1, MSM_A2M_INT(6));
+}
+
+#define APP_COMMAND 0x00
+#define APP_STATUS  0x04
+#define APP_DATA1   0x08
+#define APP_DATA2   0x0C
+
+#define MDM_COMMAND 0x10
+#define MDM_STATUS  0x14
+#define MDM_DATA1   0x18
+#define MDM_DATA2   0x1C
+
+static DEFINE_SPINLOCK(proc_comm_lock);
+
+/* The higher level SMD support will install this to
+ * provide a way to check for and handle modem restart.
+ */
+int (*msm_check_for_modem_crash)(void);
+
+/* Poll for a state change, checking for possible
+ * modem crashes along the way (so we don't wait
+ * forever while the ARM9 is blowing up).
+ *
+ * Return an error in the event of a modem crash and
+ * restart so the msm_proc_comm() routine can restart
+ * the operation from the beginning.
+ */
+static int proc_comm_wait_for(void __iomem *addr, unsigned value)
+{
+	for (;;) {
+		if (readl(addr) == value)
+			return 0;
+
+		if (msm_check_for_modem_crash)
+			if (msm_check_for_modem_crash())
+				return -EAGAIN;
+	}
+}
+
+int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2)
+{
+	void __iomem *base = MSM_SHARED_RAM_BASE;
+	unsigned long flags;
+	int ret;
+
+	spin_lock_irqsave(&proc_comm_lock, flags);
+
+	for (;;) {
+		if (proc_comm_wait_for(base + MDM_STATUS, PCOM_READY))
+			continue;
+
+		writel(cmd, base + APP_COMMAND);
+		writel(data1 ? *data1 : 0, base + APP_DATA1);
+		writel(data2 ? *data2 : 0, base + APP_DATA2);
+
+		notify_other_proc_comm();
+
+		if (proc_comm_wait_for(base + APP_COMMAND, PCOM_CMD_DONE))
+			continue;
+
+		if (readl(base + APP_STATUS) != PCOM_CMD_FAIL) {
+			if (data1)
+				*data1 = readl(base + APP_DATA1);
+			if (data2)
+				*data2 = readl(base + APP_DATA2);
+			ret = 0;
+		} else {
+			ret = -EIO;
+		}
+		break;
+	}
+
+	writel(PCOM_CMD_IDLE, base + APP_COMMAND);
+
+	spin_unlock_irqrestore(&proc_comm_lock, flags);
+
+	return ret;
+}
+
+

trunk/arch/arm/mach-msm/proc_comm.h

@@ -0,0 +1,165 @@
+/* arch/arm/mach-msm/proc_comm.h
+ *
+ * Copyright (c) 2007 QUALCOMM Incorporated
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_
+#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_
+
+enum {
+	PCOM_CMD_IDLE = 0x0,
+	PCOM_CMD_DONE,
+	PCOM_RESET_APPS,
+	PCOM_RESET_CHIP,
+	PCOM_CONFIG_NAND_MPU,
+	PCOM_CONFIG_USB_CLKS,
+	PCOM_GET_POWER_ON_STATUS,
+	PCOM_GET_WAKE_UP_STATUS,
+	PCOM_GET_BATT_LEVEL,
+	PCOM_CHG_IS_CHARGING,
+	PCOM_POWER_DOWN,
+	PCOM_USB_PIN_CONFIG,
+	PCOM_USB_PIN_SEL,
+	PCOM_SET_RTC_ALARM,
+	PCOM_NV_READ,
+	PCOM_NV_WRITE,
+	PCOM_GET_UUID_HIGH,
+	PCOM_GET_UUID_LOW,
+	PCOM_GET_HW_ENTROPY,
+	PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE,
+	PCOM_CLKCTL_RPC_ENABLE,
+	PCOM_CLKCTL_RPC_DISABLE,
+	PCOM_CLKCTL_RPC_RESET,
+	PCOM_CLKCTL_RPC_SET_FLAGS,
+	PCOM_CLKCTL_RPC_SET_RATE,
+	PCOM_CLKCTL_RPC_MIN_RATE,
+	PCOM_CLKCTL_RPC_MAX_RATE,
+	PCOM_CLKCTL_RPC_RATE,
+	PCOM_CLKCTL_RPC_PLL_REQUEST,
+	PCOM_CLKCTL_RPC_ENABLED,
+	PCOM_VREG_SWITCH,
+	PCOM_VREG_SET_LEVEL,
+	PCOM_GPIO_TLMM_CONFIG_GROUP,
+	PCOM_GPIO_TLMM_UNCONFIG_GROUP,
+	PCOM_NV_WRITE_BYTES_4_7,
+	PCOM_CONFIG_DISP,
+	PCOM_GET_FTM_BOOT_COUNT,
+	PCOM_RPC_GPIO_TLMM_CONFIG_EX,
+	PCOM_PM_MPP_CONFIG,
+	PCOM_GPIO_IN,
+	PCOM_GPIO_OUT,
+	PCOM_RESET_MODEM,
+	PCOM_RESET_CHIP_IMM,
+	PCOM_PM_VID_EN,
+	PCOM_VREG_PULLDOWN,
+	PCOM_NUM_CMDS,
+};
+
+enum {
+	 PCOM_INVALID_STATUS = 0x0,
+	 PCOM_READY,
+	 PCOM_CMD_RUNNING,
+	 PCOM_CMD_SUCCESS,
+	 PCOM_CMD_FAIL,
+};
+
+/* List of VREGs that support the Pull Down Resistor setting. */
+enum {
+	PM_VREG_PDOWN_MSMA_ID,
+	PM_VREG_PDOWN_MSMP_ID,
+	PM_VREG_PDOWN_MSME1_ID,	/* Not supported in Panoramix */
+	PM_VREG_PDOWN_MSMC1_ID,	/* Not supported in PM6620 */
+	PM_VREG_PDOWN_MSMC2_ID,	/* Supported in PM7500 only */
+	PM_VREG_PDOWN_GP3_ID,	/* Supported in PM7500 only */
+	PM_VREG_PDOWN_MSME2_ID,	/* Supported in PM7500 and Panoramix only */
+	PM_VREG_PDOWN_GP4_ID,	/* Supported in PM7500 only */
+	PM_VREG_PDOWN_GP1_ID,	/* Supported in PM7500 only */
+	PM_VREG_PDOWN_TCXO_ID,
+	PM_VREG_PDOWN_PA_ID,
+	PM_VREG_PDOWN_RFTX_ID,
+	PM_VREG_PDOWN_RFRX1_ID,
+	PM_VREG_PDOWN_RFRX2_ID,
+	PM_VREG_PDOWN_SYNT_ID,
+	PM_VREG_PDOWN_WLAN_ID,
+	PM_VREG_PDOWN_USB_ID,
+	PM_VREG_PDOWN_MMC_ID,
+	PM_VREG_PDOWN_RUIM_ID,
+	PM_VREG_PDOWN_MSMC0_ID,	/* Supported in PM6610 only */
+	PM_VREG_PDOWN_GP2_ID,	/* Supported in PM7500 only */
+	PM_VREG_PDOWN_GP5_ID,	/* Supported in PM7500 only */
+	PM_VREG_PDOWN_GP6_ID,	/* Supported in PM7500 only */
+	PM_VREG_PDOWN_RF_ID,
+	PM_VREG_PDOWN_RF_VCO_ID,
+	PM_VREG_PDOWN_MPLL_ID,
+	PM_VREG_PDOWN_S2_ID,
+	PM_VREG_PDOWN_S3_ID,
+	PM_VREG_PDOWN_RFUBM_ID,
+
+	/* new for HAN */
+	PM_VREG_PDOWN_RF1_ID,
+	PM_VREG_PDOWN_RF2_ID,
+	PM_VREG_PDOWN_RFA_ID,
+	PM_VREG_PDOWN_CDC2_ID,
+	PM_VREG_PDOWN_RFTX2_ID,
+	PM_VREG_PDOWN_USIM_ID,
+	PM_VREG_PDOWN_USB2P6_ID,
+	PM_VREG_PDOWN_USB3P3_ID,
+	PM_VREG_PDOWN_INVALID_ID,
+
+	/* backward compatible enums only */
+	PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID,
+	PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID,
+	PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID,
+	PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID,
+	PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID,
+	PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID,
+
+	PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID,
+	PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID,
+	PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID,
+	PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID,
+	PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID
+};
+
+/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */
+
+#define GPIO_ENABLE	0
+#define GPIO_DISABLE	1
+
+#define GPIO_INPUT	0
+#define GPIO_OUTPUT	1
+
+#define GPIO_NO_PULL	0
+#define GPIO_PULL_DOWN	1
+#define GPIO_KEEPER	2
+#define GPIO_PULL_UP	3
+
+#define GPIO_2MA	0
+#define GPIO_4MA	1
+#define GPIO_6MA	2
+#define GPIO_8MA	3
+#define GPIO_10MA	4
+#define GPIO_12MA	5
+#define GPIO_14MA	6
+#define GPIO_16MA	7
+
+#define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \
+		((((gpio) & 0x3FF) << 4)	| \
+		((func) & 0xf)			| \
+		(((dir) & 0x1) << 14)		| \
+		(((pull) & 0x3) << 15)		| \
+		(((drvstr) & 0xF) << 17))
+
+int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2);
+
+#endif