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yaml
---
r: 122842
b: refs/heads/master
c: 69fc405
h: refs/heads/master
v: v3
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Matt Carlson authored and David S. Miller committed Dec 22, 2008
1 parent de755ba commit b29e0da
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Showing 3 changed files with 8 additions and 21 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 027455adacdc142cc018e555ce391014fa227e70
refs/heads/master: 69fc405318967c7913e5b55cf3906250a26b49d0
23 changes: 6 additions & 17 deletions trunk/drivers/net/tg3.c
Original file line number Diff line number Diff line change
Expand Up @@ -12160,7 +12160,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
{ },
};
u32 misc_ctrl_reg;
u32 cacheline_sz_reg;
u32 pci_state_reg, grc_misc_cfg;
u32 val;
u16 pci_cmd;
Expand Down Expand Up @@ -12330,14 +12329,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
tp->misc_host_ctrl);

pci_read_config_dword(tp->pdev, TG3PCI_CACHELINESZ,
&cacheline_sz_reg);

tp->pci_cacheline_sz = (cacheline_sz_reg >> 0) & 0xff;
tp->pci_lat_timer = (cacheline_sz_reg >> 8) & 0xff;
tp->pci_hdr_type = (cacheline_sz_reg >> 16) & 0xff;
tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;

if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) ||
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714))
tp->pdev_peer = tg3_find_peer(tp);
Expand Down Expand Up @@ -12447,17 +12438,15 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS))
tp->tg3_flags |= TG3_FLAG_MBOX_WRITE_REORDER;

pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
&tp->pci_cacheline_sz);
pci_read_config_byte(tp->pdev, PCI_LATENCY_TIMER,
&tp->pci_lat_timer);
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 &&
tp->pci_lat_timer < 64) {
tp->pci_lat_timer = 64;

cacheline_sz_reg = ((tp->pci_cacheline_sz & 0xff) << 0);
cacheline_sz_reg |= ((tp->pci_lat_timer & 0xff) << 8);
cacheline_sz_reg |= ((tp->pci_hdr_type & 0xff) << 16);
cacheline_sz_reg |= ((tp->pci_bist & 0xff) << 24);

pci_write_config_dword(tp->pdev, TG3PCI_CACHELINESZ,
cacheline_sz_reg);
pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER,
tp->pci_lat_timer);
}

if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) {
Expand Down
4 changes: 1 addition & 3 deletions trunk/drivers/net/tg3.h
Original file line number Diff line number Diff line change
Expand Up @@ -2676,10 +2676,9 @@ struct tg3 {

/* PCI block */
u32 pci_chip_rev_id;
u16 pci_cmd;
u8 pci_cacheline_sz;
u8 pci_lat_timer;
u8 pci_hdr_type;
u8 pci_bist;

int pm_cap;
int msi_cap;
Expand Down Expand Up @@ -2730,7 +2729,6 @@ struct tg3 {

u32 led_ctrl;
u32 phy_otp;
u16 pci_cmd;

char board_part_number[24];
#define TG3_VER_SIZE 32
Expand Down

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