---

yaml
---
r: 68761
b: refs/heads/master
c: 89039b3
h: refs/heads/master
i:
  68759: be00c1b
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 3ac508be76bf4ef5861365d9f337f990d523be8f
+refs/heads/master: 89039b37be7c34194db0e72f956a5f02cfa30941

trunk/arch/x86/kernel/apic_64.c

@@ -964,8 +964,34 @@ void __init setup_boot_APIC_clock (void)
 	setup_APIC_timer();
 }
 
+/*
+ * AMD C1E enabled CPUs have a real nasty problem: Some BIOSes set the
+ * C1E flag only in the secondary CPU, so when we detect the wreckage
+ * we already have enabled the boot CPU local apic timer. Check, if
+ * disable_apic_timer is set and the DUMMY flag is cleared. If yes,
+ * set the DUMMY flag again and force the broadcast mode in the
+ * clockevents layer.
+ */
+void __cpuinit check_boot_apic_timer_broadcast(void)
+{
+	struct clock_event_device *levt = &per_cpu(lapic_events, boot_cpu_id);
+
+	if (!disable_apic_timer ||
+	    (lapic_clockevent.features & CLOCK_EVT_FEAT_DUMMY))
+		return;
+
+	printk(KERN_INFO "AMD C1E detected late. Force timer broadcast.\n");
+	lapic_clockevent.features |= CLOCK_EVT_FEAT_DUMMY;
+	levt->features |= CLOCK_EVT_FEAT_DUMMY;
+
+	local_irq_enable();
+	clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, &boot_cpu_id);
+	local_irq_disable();
+}
+
 void __cpuinit setup_secondary_APIC_clock(void)
 {
+	check_boot_apic_timer_broadcast();
 	setup_APIC_timer();
 }