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yaml --- r: 66008 b: refs/heads/master c: dbcc78b h: refs/heads/master v: v3
git-mirror · Aug 5, 2007 · b5b0805 · b5b0805
1 parent 1aff530
commit b5b0805
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: f0b5d12f2b3226c85258519d7725e63d9daf5e90
+refs/heads/master: dbcc78bebe9daed8998d9f7c4e30bd3b73a4a169
diff --git a/trunk/include/asm-blackfin/mach-bf533/defBF532.h b/trunk/include/asm-blackfin/mach-bf533/defBF532.h
@@ -928,7 +928,7 @@
 #define GM                     0x00000008	/* When RDBR full, get more (=1) data or discard (=0) incoming Data */
 #define PSSE                   0x00000010	/* Enable (=1) Slave-Select input for Master. */
 #define EMISO                  0x00000020	/* Enable (=1) MISO pin as an output. */
-#define SPI_LEN                0x00000100	/* Word length (0 => 8 bits, 1 => 16 bits) */
+#define SIZE                   0x00000100	/* Word length (0 => 8 bits, 1 => 16 bits) */
 #define LSBF                   0x00000200	/* Data format (0 => MSB sent/received first 1 => LSB sent/received first) */
 #define CPHA                   0x00000400	/* Clock phase (0 => SPICLK starts toggling in middle of xfer, 1 => SPICLK toggles at the beginning of xfer. */
 #define CPOL                   0x00000800	/* Clock polarity (0 => active-high, 1 => active-low) */

diff --git a/trunk/include/asm-blackfin/mach-bf537/defBF534.h b/trunk/include/asm-blackfin/mach-bf537/defBF534.h
@@ -1165,7 +1165,7 @@
 #define GM			0x0008	/* Get More (When RDBR Full, Overwrite/Discard*)        */
 #define PSSE		0x0010	/* Slave-Select Input Enable                                            */
 #define EMISO		0x0020	/* Enable MISO As Output                                                        */
-#define SPI_SIZE	0x0100	/* Size of Words (16/8* Bits)                                           */
+#define SIZE		0x0100	/* Size of Words (16/8* Bits)                                           */
 #define LSBF		0x0200	/* LSB First                                                                            */
 #define CPHA		0x0400	/* Clock Phase                                                                          */
 #define CPOL		0x0800	/* Clock Polarity                                                                       */