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Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (237 commits) ARM: 7004/1: fix traps.h compile warnings ARM: 6998/2: kernel: use proper memory barriers for bitops ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAM ARM: Fix build errors caused by adding generic macros ARM: CPU hotplug: ensure we migrate all IRQs off a downed CPU ARM: CPU hotplug: pass in proper affinity mask on IRQ migration ARM: GIC: avoid routing interrupts to offline CPUs ARM: CPU hotplug: fix abuse of irqdesc->node ARM: 6981/2: mmci: adjust calculation of f_min ARM: 7000/1: LPAE: Use long long printk format for displaying the pud ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence ARM: ARM_DMA_ZONE_SIZE is no more ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ...
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ROM-able zImage boot from eSD | ||
----------------------------- | ||
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An ROM-able zImage compiled with ZBOOT_ROM_SDHI may be written to eSD and | ||
SuperH Mobile ARM will to boot directly from the SDHI hardware block. | ||
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This is achieved by the mask ROM loading the first portion of the image into | ||
MERAM and then jumping to it. This portion contains loader code which | ||
copies the entire image to SDRAM and jumps to it. From there the zImage | ||
boot code proceeds as normal, uncompressing the image into its final | ||
location and then jumping to it. | ||
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This code has been tested on an mackerel board using the developer 1A eSD | ||
boot mode which is configured using the following jumper settings. | ||
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8 7 6 5 4 3 2 1 | ||
x|x|x|x| |x|x| | ||
S4 -+-+-+-+-+-+-+- | ||
| | | |x| | |x on | ||
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The eSD card needs to be present in SDHI slot 1 (CN7). | ||
As such S1 and S33 also need to be configured as per | ||
the notes in arch/arm/mach-shmobile/board-mackerel.c. | ||
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A partial zImage must be written to physical partition #1 (boot) | ||
of the eSD at sector 0 in vrl4 format. A utility vrl4 is supplied to | ||
accomplish this. | ||
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e.g. | ||
vrl4 < zImage | dd of=/dev/sdX bs=512 count=17 | ||
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A full copy of _the same_ zImage should be written to physical partition #1 | ||
(boot) of the eSD at sector 0. This should _not_ be in vrl4 format. | ||
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vrl4 < zImage | dd of=/dev/sdX bs=512 | ||
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Note: The commands above assume that the physical partition has been | ||
switched. No such facility currently exists in the Linux Kernel. | ||
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Physical partitions are described in the eSD specification. At the time of | ||
writing they are not the same as partitions that are typically configured | ||
using fdisk and visible through /proc/partitions |
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Kernel-provided User Helpers | ||
============================ | ||
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These are segment of kernel provided user code reachable from user space | ||
at a fixed address in kernel memory. This is used to provide user space | ||
with some operations which require kernel help because of unimplemented | ||
native feature and/or instructions in many ARM CPUs. The idea is for this | ||
code to be executed directly in user mode for best efficiency but which is | ||
too intimate with the kernel counter part to be left to user libraries. | ||
In fact this code might even differ from one CPU to another depending on | ||
the available instruction set, or whether it is a SMP systems. In other | ||
words, the kernel reserves the right to change this code as needed without | ||
warning. Only the entry points and their results as documented here are | ||
guaranteed to be stable. | ||
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This is different from (but doesn't preclude) a full blown VDSO | ||
implementation, however a VDSO would prevent some assembly tricks with | ||
constants that allows for efficient branching to those code segments. And | ||
since those code segments only use a few cycles before returning to user | ||
code, the overhead of a VDSO indirect far call would add a measurable | ||
overhead to such minimalistic operations. | ||
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User space is expected to bypass those helpers and implement those things | ||
inline (either in the code emitted directly by the compiler, or part of | ||
the implementation of a library call) when optimizing for a recent enough | ||
processor that has the necessary native support, but only if resulting | ||
binaries are already to be incompatible with earlier ARM processors due to | ||
useage of similar native instructions for other things. In other words | ||
don't make binaries unable to run on earlier processors just for the sake | ||
of not using these kernel helpers if your compiled code is not going to | ||
use new instructions for other purpose. | ||
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New helpers may be added over time, so an older kernel may be missing some | ||
helpers present in a newer kernel. For this reason, programs must check | ||
the value of __kuser_helper_version (see below) before assuming that it is | ||
safe to call any particular helper. This check should ideally be | ||
performed only once at process startup time, and execution aborted early | ||
if the required helpers are not provided by the kernel version that | ||
process is running on. | ||
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kuser_helper_version | ||
-------------------- | ||
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Location: 0xffff0ffc | ||
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Reference declaration: | ||
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extern int32_t __kuser_helper_version; | ||
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Definition: | ||
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This field contains the number of helpers being implemented by the | ||
running kernel. User space may read this to determine the availability | ||
of a particular helper. | ||
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Usage example: | ||
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#define __kuser_helper_version (*(int32_t *)0xffff0ffc) | ||
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void check_kuser_version(void) | ||
{ | ||
if (__kuser_helper_version < 2) { | ||
fprintf(stderr, "can't do atomic operations, kernel too old\n"); | ||
abort(); | ||
} | ||
} | ||
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Notes: | ||
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User space may assume that the value of this field never changes | ||
during the lifetime of any single process. This means that this | ||
field can be read once during the initialisation of a library or | ||
startup phase of a program. | ||
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kuser_get_tls | ||
------------- | ||
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Location: 0xffff0fe0 | ||
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Reference prototype: | ||
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void * __kuser_get_tls(void); | ||
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Input: | ||
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lr = return address | ||
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Output: | ||
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r0 = TLS value | ||
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Clobbered registers: | ||
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none | ||
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Definition: | ||
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Get the TLS value as previously set via the __ARM_NR_set_tls syscall. | ||
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Usage example: | ||
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typedef void * (__kuser_get_tls_t)(void); | ||
#define __kuser_get_tls (*(__kuser_get_tls_t *)0xffff0fe0) | ||
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void foo() | ||
{ | ||
void *tls = __kuser_get_tls(); | ||
printf("TLS = %p\n", tls); | ||
} | ||
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Notes: | ||
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- Valid only if __kuser_helper_version >= 1 (from kernel version 2.6.12). | ||
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kuser_cmpxchg | ||
------------- | ||
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Location: 0xffff0fc0 | ||
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Reference prototype: | ||
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int __kuser_cmpxchg(int32_t oldval, int32_t newval, volatile int32_t *ptr); | ||
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Input: | ||
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r0 = oldval | ||
r1 = newval | ||
r2 = ptr | ||
lr = return address | ||
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Output: | ||
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r0 = success code (zero or non-zero) | ||
C flag = set if r0 == 0, clear if r0 != 0 | ||
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Clobbered registers: | ||
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r3, ip, flags | ||
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Definition: | ||
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Atomically store newval in *ptr only if *ptr is equal to oldval. | ||
Return zero if *ptr was changed or non-zero if no exchange happened. | ||
The C flag is also set if *ptr was changed to allow for assembly | ||
optimization in the calling code. | ||
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Usage example: | ||
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typedef int (__kuser_cmpxchg_t)(int oldval, int newval, volatile int *ptr); | ||
#define __kuser_cmpxchg (*(__kuser_cmpxchg_t *)0xffff0fc0) | ||
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int atomic_add(volatile int *ptr, int val) | ||
{ | ||
int old, new; | ||
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do { | ||
old = *ptr; | ||
new = old + val; | ||
} while(__kuser_cmpxchg(old, new, ptr)); | ||
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return new; | ||
} | ||
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Notes: | ||
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- This routine already includes memory barriers as needed. | ||
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- Valid only if __kuser_helper_version >= 2 (from kernel version 2.6.12). | ||
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kuser_memory_barrier | ||
-------------------- | ||
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Location: 0xffff0fa0 | ||
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Reference prototype: | ||
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void __kuser_memory_barrier(void); | ||
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Input: | ||
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lr = return address | ||
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Output: | ||
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none | ||
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Clobbered registers: | ||
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none | ||
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Definition: | ||
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Apply any needed memory barrier to preserve consistency with data modified | ||
manually and __kuser_cmpxchg usage. | ||
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Usage example: | ||
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typedef void (__kuser_dmb_t)(void); | ||
#define __kuser_dmb (*(__kuser_dmb_t *)0xffff0fa0) | ||
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Notes: | ||
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- Valid only if __kuser_helper_version >= 3 (from kernel version 2.6.15). | ||
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kuser_cmpxchg64 | ||
--------------- | ||
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Location: 0xffff0f60 | ||
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Reference prototype: | ||
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int __kuser_cmpxchg64(const int64_t *oldval, | ||
const int64_t *newval, | ||
volatile int64_t *ptr); | ||
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Input: | ||
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r0 = pointer to oldval | ||
r1 = pointer to newval | ||
r2 = pointer to target value | ||
lr = return address | ||
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Output: | ||
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r0 = success code (zero or non-zero) | ||
C flag = set if r0 == 0, clear if r0 != 0 | ||
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Clobbered registers: | ||
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r3, lr, flags | ||
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Definition: | ||
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Atomically store the 64-bit value pointed by *newval in *ptr only if *ptr | ||
is equal to the 64-bit value pointed by *oldval. Return zero if *ptr was | ||
changed or non-zero if no exchange happened. | ||
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The C flag is also set if *ptr was changed to allow for assembly | ||
optimization in the calling code. | ||
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Usage example: | ||
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typedef int (__kuser_cmpxchg64_t)(const int64_t *oldval, | ||
const int64_t *newval, | ||
volatile int64_t *ptr); | ||
#define __kuser_cmpxchg64 (*(__kuser_cmpxchg64_t *)0xffff0f60) | ||
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int64_t atomic_add64(volatile int64_t *ptr, int64_t val) | ||
{ | ||
int64_t old, new; | ||
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do { | ||
old = *ptr; | ||
new = old + val; | ||
} while(__kuser_cmpxchg64(&old, &new, ptr)); | ||
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return new; | ||
} | ||
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Notes: | ||
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- This routine already includes memory barriers as needed. | ||
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- Due to the length of this sequence, this spans 2 conventional kuser | ||
"slots", therefore 0xffff0f80 is not used as a valid entry point. | ||
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- Valid only if __kuser_helper_version >= 5 (from kernel version 3.1). |
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* ARM Performance Monitor Units | ||
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ARM cores often have a PMU for counting cpu and cache events like cache misses | ||
and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU | ||
representation in the device tree should be done as under:- | ||
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Required properties: | ||
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- compatible : should be one of | ||
"arm,cortex-a9-pmu" | ||
"arm,cortex-a8-pmu" | ||
"arm,arm1176-pmu" | ||
"arm,arm1136-pmu" | ||
- interrupts : 1 combined interrupt or 1 per core. | ||
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Example: | ||
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pmu { | ||
compatible = "arm,cortex-a9-pmu"; | ||
interrupts = <100 101>; | ||
}; |
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