---

yaml --- r: 155998 b: refs/heads/master c: 3e43d82 h: refs/heads/master v: v3
git-mirror · Jul 15, 2009 · b80037c · b80037c
1 parent 12dd5b6
commit b80037c
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Showing 3 changed files with 9 additions and 4 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4162338a1dab388474d4115289d1d7071623f04d
+refs/heads/master: 3e43d82125952826202a8cd20ba84a66f3ff8808
diff --git a/trunk/drivers/gpu/drm/radeon/r100.c b/trunk/drivers/gpu/drm/radeon/r100.c
@@ -215,7 +215,6 @@ int r100_mc_init(struct radeon_device *rdev)
 	r100_pci_gart_disable(rdev);
 
 	/* Setup GPU memory space */
-	rdev->mc.vram_location = 0xFFFFFFFFUL;
 	rdev->mc.gtt_location = 0xFFFFFFFFUL;
 	if (rdev->flags & RADEON_IS_AGP) {
 		r = radeon_agp_init(rdev);
@@ -1265,6 +1264,8 @@ void r100_vram_info(struct radeon_device *rdev)
 		/* read NB_TOM to get the amount of ram stolen for the GPU */
 		tom = RREG32(RADEON_NB_TOM);
 		rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);
+		/* for IGPs we need to keep VRAM where it was put by the BIOS */
+		rdev->mc.vram_location = (tom & 0xffff) << 16;
 		WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size);
 	} else {
 		rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
@@ -1275,6 +1276,8 @@ void r100_vram_info(struct radeon_device *rdev)
 			rdev->mc.vram_size = 8192 * 1024;
 			WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size);
 		}
+		/* let driver place VRAM */
+		rdev->mc.vram_location = 0xFFFFFFFFUL;
 	}
 
 	rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);

diff --git a/trunk/drivers/gpu/drm/radeon/rs400.c b/trunk/drivers/gpu/drm/radeon/rs400.c
@@ -235,7 +235,6 @@ int rs400_mc_init(struct radeon_device *rdev)
 	rdev->mc.gtt_location = rdev->mc.vram_size;
 	rdev->mc.gtt_location += (rdev->mc.gtt_size - 1);
 	rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1);
-	rdev->mc.vram_location = 0xFFFFFFFFUL;
 	r = radeon_mc_setup(rdev);
 	if (r) {
 		return r;
@@ -305,7 +304,10 @@ void rs400_vram_info(struct radeon_device *rdev)
 	rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);
 	WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size);
 
-	/* Could aper size report 0 ? */
+	/* RS480 IGPs don't seem to translate to main RAM, they
+	 * just reserve and scan out of it. So setting VRAM location
+	 * to say 0, will actually trash the OS. */
+	rdev->mc.vram_location = (tom & 0xffff) << 16;
 	rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
 	rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
 }