---

yaml
---
r: 65089
b: refs/heads/master
c: e1cc9de
h: refs/heads/master
i:
  65087: 7b347bd
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 0e3dbc01d53940fe10e5a5cfec15ede3e929c918
+refs/heads/master: e1cc9de8361f267101402a1181cff4d3d3225a6d

trunk/drivers/ata/libata-sff.c

@@ -297,7 +297,7 @@ void ata_bmdma_start (struct ata_queued_cmd *qc)
 	dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
 	iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
 
-	/* Strictly, one may wish to issue a readb() here, to
+	/* Strictly, one may wish to issue an ioread8() here, to
 	 * flush the mmio write.  However, control also passes
 	 * to the hardware at this point, and it will interrupt
 	 * us when we are to resume control.  So, in effect,
@@ -307,6 +307,9 @@ void ata_bmdma_start (struct ata_queued_cmd *qc)
 	 * is expected, so I think it is best to not add a readb()
 	 * without first all the MMIO ATA cards/mobos.
 	 * Or maybe I'm just being paranoid.
+	 *
+	 * FIXME: The posting of this write means I/O starts are
+	 * unneccessarily delayed for MMIO
 	 */
 }