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yaml
---
r: 164850
b: refs/heads/master
c: 0e3ca33
h: refs/heads/master
v: v3
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Florian Tobias Schandinat authored and Linus Torvalds committed Sep 23, 2009
1 parent 0174421 commit b96f6fc
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Showing 4 changed files with 2 additions and 67 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 88017bda96a5fd568a982b01546c8fb1782dda62
refs/heads/master: 0e3ca33ac7aa88ac2f28d4ec99f0bfeaf2a2318d
5 changes: 1 addition & 4 deletions trunk/drivers/video/via/hw.c
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Expand Up @@ -2271,11 +2271,8 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
break;

case UNICHROME_CX700:
viafb_write_regx(CX700_ModeXregs, NUM_TOTAL_CX700_ModeXregs);

case UNICHROME_VX800:
viafb_write_regx(VX800_ModeXregs, NUM_TOTAL_VX800_ModeXregs);

viafb_write_regx(CX700_ModeXregs, NUM_TOTAL_CX700_ModeXregs);
break;
}

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61 changes: 0 additions & 61 deletions trunk/drivers/video/via/viamode.c
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Expand Up @@ -329,67 +329,6 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */
};

/* For VT3353: Common Setting for Video Mode */
struct io_reg VX800_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
{VIASR, SR15, 0x02, 0x02},
{VIASR, SR16, 0xBF, 0x08},
{VIASR, SR17, 0xFF, 0x1F},
{VIASR, SR18, 0xFF, 0x4E},
{VIASR, SR1A, 0xFB, 0x08},
{VIASR, SR1B, 0xFF, 0xF0},
{VIASR, SR1E, 0xFF, 0x01},
{VIASR, SR2A, 0xFF, 0x00},
{VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */
{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
{VIACR, CR32, 0xFF, 0x00},
{VIACR, CR33, 0xFF, 0x00},
{VIACR, CR34, 0xFF, 0x00},
{VIACR, CR35, 0xFF, 0x00},
{VIACR, CR36, 0x08, 0x00},
{VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */
{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */
{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */
{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */
{VIACR, CRA3, 0xFF, 0x00}, /* Secondary Display Starting Address */
{VIACR, CR69, 0xFF, 0x00},
{VIACR, CR6A, 0xFF, 0x40},
{VIACR, CR6B, 0xFF, 0x00},
{VIACR, CR6C, 0xFF, 0x00},
{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */
{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */
{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */
{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */
{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */
{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */
{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */
{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */
{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */
{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */
{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */
{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */
{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */
{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */
{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
{VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */
{VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */
{VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */
{VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */
{VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */
{VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */
{VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */
{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
{VIACR, CR96, 0xFF, 0x00},
{VIACR, CR97, 0xFF, 0x00},
{VIACR, CR99, 0xFF, 0x00},
{VIACR, CR9B, 0xFF, 0x00},
{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */
};

/* Video Mode Table */
/* Common Setting for Video Mode */
struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00},
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1 change: 0 additions & 1 deletion trunk/drivers/video/via/viamode.h
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Expand Up @@ -56,7 +56,6 @@ struct res_map_refresh {
#define NUM_TOTAL_CN700_ModeXregs ARRAY_SIZE(CN700_ModeXregs)
#define NUM_TOTAL_KM400_ModeXregs ARRAY_SIZE(KM400_ModeXregs)
#define NUM_TOTAL_CX700_ModeXregs ARRAY_SIZE(CX700_ModeXregs)
#define NUM_TOTAL_VX800_ModeXregs ARRAY_SIZE(VX800_ModeXregs)
#define NUM_TOTAL_CLE266_ModeXregs ARRAY_SIZE(CLE266_ModeXregs)
#define NUM_TOTAL_PATCH_MODE ARRAY_SIZE(res_patch_table)
#define NUM_TOTAL_MODETABLE ARRAY_SIZE(CLE266Modes)
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