---

yaml
---
r: 91167
b: refs/heads/master
c: d2db9aa
h: refs/heads/master
i:
  91165: 0846682
  91163: 9e0850d
  91159: caf00de
  91151: e2bd8d5
  91135: 317bc7d
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2c130fd5294499cd94578f8c792e190959372763
+refs/heads/master: d2db9aaa4a5b9f2a1d54080c13f5ff4fc6d0ae1b

trunk/arch/arm/plat-mxc/Kconfig

@@ -4,7 +4,7 @@ menu "Freescale MXC Implementations"
 
 choice
 	prompt "MXC/iMX System Type"
-	default 0
+	default ARCH_MX3
 
 config ARCH_MX3
 	bool "MX3-based"

trunk/include/asm-arm/arch-mxc/hardware.h

@@ -13,34 +13,19 @@
 
 #include <asm/sizes.h>
 
-#include <asm/arch/mx31.h>
+#ifdef CONFIG_ARCH_MX3
+# include <asm/arch/mx31.h>
+#endif
 
 #include <asm/arch/mxc.h>
 
-#define MXC_MAX_GPIO_LINES      (GPIO_NUM_PIN * GPIO_PORT_NUM)
-
 /*
  * ---------------------------------------------------------------------------
  * Board specific defines
  * ---------------------------------------------------------------------------
  */
-#define MXC_EXP_IO_BASE         (MXC_GPIO_INT_BASE + MXC_MAX_GPIO_LINES)
-
-#include <asm/arch/board-mx31ads.h>
-
-#ifndef MXC_MAX_EXP_IO_LINES
-#define MXC_MAX_EXP_IO_LINES 0
+#ifdef CONFIG_MACH_MX31ADS
+# include <asm/arch/board-mx31ads.h>
 #endif
 
-#define MXC_MAX_VIRTUAL_INTS	16
-#define MXC_VIRTUAL_INTS_BASE	(MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES)
-#define MXC_SDIO1_CARD_IRQ	MXC_VIRTUAL_INTS_BASE
-#define MXC_SDIO2_CARD_IRQ	(MXC_VIRTUAL_INTS_BASE + 1)
-#define MXC_SDIO3_CARD_IRQ	(MXC_VIRTUAL_INTS_BASE + 2)
-
-#define MXC_MAX_INTS            (MXC_MAX_INT_LINES + \
-                                MXC_MAX_GPIO_LINES + \
-                                MXC_MAX_EXP_IO_LINES + \
-                                MXC_MAX_VIRTUAL_INTS)
-
 #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */

trunk/include/asm-arm/arch-mxc/irqs.h

@@ -19,7 +19,9 @@
 #define MXC_GPIO_TO_IRQ(x)	(MXC_GPIO_INT_BASE + x)
 
 /* Number of normal interrupts */
-#define NR_IRQS		MXC_MAX_INTS
+#define NR_IRQS		(MXC_MAX_INT_LINES + \
+			MXC_MAX_GPIO_LINES + \
+			MXC_MAX_VIRTUAL_INTS)
 
 /* Number of fast interrupts */
 #define NR_FIQS		MXC_MAX_INTS

trunk/include/asm-arm/arch-mxc/mx31.h

@@ -317,6 +317,8 @@
 #define MXC_MAX_INT_LINES	64
 
 #define MXC_GPIO_INT_BASE	MXC_MAX_INT_LINES
+#define MXC_MAX_GPIO_LINES      (GPIO_NUM_PIN * GPIO_PORT_NUM)
+#define MXC_MAX_VIRTUAL_INTS	16
 
 /*!
  * Number of GPIO port as defined in the IC Spec
@@ -329,7 +331,33 @@
 
 #define PROD_SIGNATURE		0x1	/* For MX31 */
 
+/* silicon revisions specific to i.MX31 */
+#define CHIP_REV_1_0		0x10
+#define CHIP_REV_1_1		0x11
+#define CHIP_REV_1_2		0x12
+#define CHIP_REV_1_3		0x13
+#define CHIP_REV_2_0		0x20
+#define CHIP_REV_2_1		0x21
+#define CHIP_REV_2_2		0x22
+#define CHIP_REV_2_3		0x23
+#define CHIP_REV_3_0		0x30
+#define CHIP_REV_3_1		0x31
+#define CHIP_REV_3_2		0x32
+
 #define SYSTEM_REV_MIN		CHIP_REV_1_0
 #define SYSTEM_REV_NUM		3
 
-#endif			/*  __ASM_ARCH_MXC_MX31_H__ */
+#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
+
+/* this is a i.MX31 CPU */
+#define cpu_is_mx31()		(1)
+
+extern unsigned int system_rev;
+
+static inline int mx31_revision(void)
+{
+	return system_rev;
+}
+#endif
+
+#endif /*  __ASM_ARCH_MXC_MX31_H__ */

trunk/include/asm-arm/arch-mxc/mxc.h

@@ -15,6 +15,11 @@
 #error "Do not include directly."
 #endif
 
+/* clean up all things that are not used */
+#ifndef CONFIG_ARCH_MX3
+# define cpu_is_mx31() (0)
+#endif
+
 /*
  *****************************************
  * GPT  Register definitions             *