Skip to content

Commit

Permalink
gpio/omap: enable irq at the end of all configuration in restore
Browse files Browse the repository at this point in the history
Setup the interrupt enable registers only after we have configured the
required edge and required configurations, not before, to prevent
spurious events as part of restore routine.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
  • Loading branch information
Nishanth Menon authored and Tarun Kanti DebBarma committed Feb 6, 2012
1 parent ae54735 commit ba805be
Showing 1 changed file with 5 additions and 4 deletions.
9 changes: 5 additions & 4 deletions drivers/gpio/gpio-omap.c
Original file line number Diff line number Diff line change
Expand Up @@ -1352,10 +1352,6 @@ void omap2_gpio_resume_after_idle(void)
#if defined(CONFIG_PM_RUNTIME)
static void omap_gpio_restore_context(struct gpio_bank *bank)
{
__raw_writel(bank->context.irqenable1,
bank->base + bank->regs->irqenable);
__raw_writel(bank->context.irqenable2,
bank->base + bank->regs->irqenable2);
__raw_writel(bank->context.wake_en,
bank->base + bank->regs->wkup_en);
__raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
Expand All @@ -1375,6 +1371,11 @@ static void omap_gpio_restore_context(struct gpio_bank *bank)
__raw_writel(bank->context.debounce_en,
bank->base + bank->regs->debounce_en);
}

__raw_writel(bank->context.irqenable1,
bank->base + bank->regs->irqenable);
__raw_writel(bank->context.irqenable2,
bank->base + bank->regs->irqenable2);
}
#endif /* CONFIG_PM_RUNTIME */
#else
Expand Down

0 comments on commit ba805be

Please sign in to comment.