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yaml
---
r: 89245
b: refs/heads/master
c: 9c0bf67
h: refs/heads/master
i:
  89243: 8adfbe6
v: v3
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Tejun Heo authored and Jeff Garzik committed Apr 17, 2008
1 parent 7ed0a4d commit bb76759
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Showing 2 changed files with 26 additions and 37 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 5016d7d212dbcc85cdc5130b1228d23f3423bd61
refs/heads/master: 9c0bf675054883acd10dec99c0c854514e139f06
61 changes: 25 additions & 36 deletions trunk/drivers/ata/ata_piix.c
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Original file line number Diff line number Diff line change
Expand Up @@ -138,12 +138,11 @@ enum piix_controller_ids {
ich_pata_100, /* ICH up to UDMA 100 */
ich5_sata,
ich6_sata,
ich6_sata_ahci,
ich6m_sata_ahci,
ich8_sata_ahci,
ich6m_sata,
ich8_sata,
ich8_2port_sata,
ich8m_apple_sata_ahci, /* locks up on second port enable */
tolapai_sata_ahci,
ich8m_apple_sata, /* locks up on second port enable */
tolapai_sata,
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
};

Expand Down Expand Up @@ -235,27 +234,27 @@ static const struct pci_device_id piix_pci_tbl[] = {
/* 82801FB/FW (ICH6/ICH6W) */
{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* 82801FR/FRW (ICH6R/ICH6RW) */
{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented).
* Attach iff the controller is in IDE mode. */
{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata_ahci },
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata },
/* 82801GB/GR/GH (ICH7, identical to ICH6) */
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* 2801GBM/GHM (ICH7M, identical to ICH6M) */
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata },
/* Enterprise Southbridge 2 (631xESB/632xESB) */
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* SATA Controller 1 IDE (ICH8) */
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller 2 IDE (ICH8) */
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* Mobile SATA Controller IDE (ICH8M) */
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* Mobile SATA Controller IDE (ICH8M), Apple */
{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata_ahci },
{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
/* SATA Controller IDE (ICH9) */
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH9) */
{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (ICH9) */
Expand All @@ -265,15 +264,15 @@ static const struct pci_device_id piix_pci_tbl[] = {
/* SATA Controller IDE (ICH9M) */
{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (ICH9M) */
{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (Tolapai) */
{ 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata_ahci },
{ 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },

Expand Down Expand Up @@ -421,12 +420,11 @@ static const struct piix_map_db tolapai_map_db = {
static const struct piix_map_db *piix_map_db_table[] = {
[ich5_sata] = &ich5_map_db,
[ich6_sata] = &ich6_map_db,
[ich6_sata_ahci] = &ich6_map_db,
[ich6m_sata_ahci] = &ich6m_map_db,
[ich8_sata_ahci] = &ich8_map_db,
[ich6m_sata] = &ich6m_map_db,
[ich8_sata] = &ich8_map_db,
[ich8_2port_sata] = &ich8_2port_map_db,
[ich8m_apple_sata_ahci] = &ich8m_apple_map_db,
[tolapai_sata_ahci] = &tolapai_map_db,
[ich8m_apple_sata] = &ich8m_apple_map_db,
[tolapai_sata] = &tolapai_map_db,
};

static struct ata_port_info piix_port_info[] = {
Expand Down Expand Up @@ -492,7 +490,7 @@ static struct ata_port_info piix_port_info[] = {
.port_ops = &piix_sata_ops,
},

[ich6_sata_ahci] =
[ich6m_sata] =
{
.flags = PIIX_SATA_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
Expand All @@ -501,16 +499,7 @@ static struct ata_port_info piix_port_info[] = {
.port_ops = &piix_sata_ops,
},

[ich6m_sata_ahci] =
{
.flags = PIIX_SATA_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},

[ich8_sata_ahci] =
[ich8_sata] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
.pio_mask = 0x1f, /* pio0-4 */
Expand All @@ -528,7 +517,7 @@ static struct ata_port_info piix_port_info[] = {
.port_ops = &piix_sata_ops,
},

[tolapai_sata_ahci] =
[tolapai_sata] =
{
.flags = PIIX_SATA_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
Expand All @@ -537,7 +526,7 @@ static struct ata_port_info piix_port_info[] = {
.port_ops = &piix_sata_ops,
},

[ich8m_apple_sata_ahci] =
[ich8m_apple_sata] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
.pio_mask = 0x1f, /* pio0-4 */
Expand Down

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