---

yaml
---
r: 294866
b: refs/heads/master
c: d585681
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6fb65a66a227013ba1825efcf47e3c5df1a39131
+refs/heads/master: d585681374ed23a707b572a1199d510e518d7522

trunk/drivers/media/dvb/dvb-usb/az6007.c

@@ -67,6 +67,7 @@ static struct drxk_config terratec_h7_drxk = {
 	.parallel_ts = true,
 	.dynamic_clk = true,
 	.single_master = true,
+	.enable_merr_cfg = true,
 	.no_i2c_bridge = false,
 	.chunk_size = 64,
 	.mpeg_out_clk_strength = 0x02,

trunk/drivers/media/dvb/frontends/drxk.h

@@ -12,6 +12,7 @@
  * 			Serial otherwise.
  * @dynamic_clk:	True means that the clock will be dynamically
  *			adjusted. Static clock otherwise.
+ * @enable_merr_cfg:	Enable SIO_PDR_PERR_CFG/SIO_PDR_MVAL_CFG.
  * @single_master:	Device is on the single master mode
  * @no_i2c_bridge:	Don't switch the I2C bridge to talk with tuner
  * @antenna_gpio:	GPIO bit used to control the antenna
@@ -29,6 +30,7 @@ struct drxk_config {
 	bool	no_i2c_bridge;
 	bool	parallel_ts;
 	bool	dynamic_clk;
+	bool	enable_merr_cfg;
 
 	bool	antenna_dvbt;
 	u16	antenna_gpio;

trunk/drivers/media/dvb/frontends/drxk_hard.c

@@ -1179,6 +1179,7 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable)
 	int status = -1;
 	u16 sioPdrMclkCfg = 0;
 	u16 sioPdrMdxCfg = 0;
+	u16 err_cfg = 0;
 
 	dprintk(1, ": mpeg %s, %s mode\n",
 		mpegEnable ? "enable" : "disable",
@@ -1244,12 +1245,17 @@ static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable)
 		status = write16(state, SIO_PDR_MSTRT_CFG__A, sioPdrMdxCfg);
 		if (status < 0)
 			goto error;
-		status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000);	/* Disable */
+
+		if (state->enable_merr_cfg)
+			err_cfg = sioPdrMdxCfg;
+
+		status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg);
 		if (status < 0)
 			goto error;
-		status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000);	/* Disable */
+		status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg);
 		if (status < 0)
 			goto error;
+
 		if (state->m_enableParallel == true) {
 			/* paralel -> enable MD1 to MD7 */
 			status = write16(state, SIO_PDR_MD1_CFG__A, sioPdrMdxCfg);
@@ -6379,6 +6385,7 @@ struct dvb_frontend *drxk_attach(const struct drxk_config *config,
 	state->antenna_gpio = config->antenna_gpio;
 	state->antenna_dvbt = config->antenna_dvbt;
 	state->m_ChunkSize = config->chunk_size;
+	state->enable_merr_cfg = config->enable_merr_cfg;
 
 	if (config->dynamic_clk) {
 		state->m_DVBTStaticCLK = 0;

trunk/drivers/media/dvb/frontends/drxk_hard.h

@@ -332,6 +332,7 @@ struct drxk_state {
 
 	u16	UIO_mask;	/* Bits used by UIO */
 
+	bool	enable_merr_cfg;
 	bool	single_master;
 	bool	no_i2c_bridge;
 	bool	antenna_dvbt;