Skip to content

Commit

Permalink
ASoC: mxs-saif: clear clk gate first before register setting
Browse files Browse the repository at this point in the history
Saif needs clear clk gate first before writing registers or the write
will not success.

The original xx_get_mclk function clear clk gate after mclk setting
that may cause the former mclk setting unwork, then the real output
mclk maybe inaccurate.
Placing the clear before setting mclk to avoid such an issue.

We also have to clear clk gate in startup instead of in prepare function.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
  • Loading branch information
Dong Aisheng authored and Mark Brown committed Aug 22, 2011
1 parent 09d930a commit bbe8ff5
Showing 1 changed file with 12 additions and 10 deletions.
22 changes: 12 additions & 10 deletions sound/soc/mxs/mxs-saif.c
Original file line number Diff line number Diff line change
Expand Up @@ -187,16 +187,20 @@ int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk,
if (!saif)
return -EINVAL;

/* Clear Reset */
__raw_writel(BM_SAIF_CTRL_SFTRST,
saif->base + SAIF_CTRL + MXS_CLR_ADDR);

/* FIXME: need clear clk gate for register r/w */
__raw_writel(BM_SAIF_CTRL_CLKGATE,
saif->base + SAIF_CTRL + MXS_CLR_ADDR);

stat = __raw_readl(saif->base + SAIF_STAT);
if (stat & BM_SAIF_STAT_BUSY) {
dev_err(saif->dev, "error: busy\n");
return -EBUSY;
}

/* Clear Reset */
__raw_writel(BM_SAIF_CTRL_SFTRST,
saif->base + SAIF_CTRL + MXS_CLR_ADDR);

saif->mclk_in_use = 1;
ret = mxs_saif_set_clk(saif, mclk, rate);
if (ret)
Expand All @@ -207,8 +211,6 @@ int mxs_saif_get_mclk(unsigned int saif_id, unsigned int mclk,
return ret;

/* enable MCLK output */
__raw_writel(BM_SAIF_CTRL_CLKGATE,
saif->base + SAIF_CTRL + MXS_CLR_ADDR);
__raw_writel(BM_SAIF_CTRL_RUN,
saif->base + SAIF_CTRL + MXS_SET_ADDR);

Expand Down Expand Up @@ -303,6 +305,10 @@ static int mxs_saif_startup(struct snd_pcm_substream *substream,
__raw_writel(BM_SAIF_CTRL_SFTRST,
saif->base + SAIF_CTRL + MXS_CLR_ADDR);

/* clear clock gate */
__raw_writel(BM_SAIF_CTRL_CLKGATE,
saif->base + SAIF_CTRL + MXS_CLR_ADDR);

return 0;
}

Expand Down Expand Up @@ -379,10 +385,6 @@ static int mxs_saif_prepare(struct snd_pcm_substream *substream,
{
struct mxs_saif *saif = snd_soc_dai_get_drvdata(cpu_dai);

/* clear clock gate */
__raw_writel(BM_SAIF_CTRL_CLKGATE,
saif->base + SAIF_CTRL + MXS_CLR_ADDR);

/* enable FIFO error irqs */
__raw_writel(BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN,
saif->base + SAIF_CTRL + MXS_SET_ADDR);
Expand Down

0 comments on commit bbe8ff5

Please sign in to comment.