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Merge branch 'sh/g3-prep'
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Paul Mundt committed Oct 2, 2008
2 parents a2159b5 + 225c9a8 commit bc0f424
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Showing 16 changed files with 197 additions and 175 deletions.
2 changes: 1 addition & 1 deletion arch/sh/boards/board-ap325rxa.c
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@
#include <linux/smc911x.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <asm/sh_mobile_lcdc.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/io.h>
#include <asm/clock.h>

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2 changes: 1 addition & 1 deletion arch/sh/boards/mach-migor/lcd_qvga.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/sh_mobile_lcdc.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/migor.h>

/* LCD Module is a PH240320T according to board schematics. This module
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2 changes: 1 addition & 1 deletion arch/sh/boards/mach-migor/setup.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,11 +19,11 @@
#include <linux/clk.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/clock.h>
#include <asm/machvec.h>
#include <asm/io.h>
#include <asm/sh_keysc.h>
#include <asm/sh_mobile_lcdc.h>
#include <asm/migor.h>

/* Address IRQ Size Bus Description
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92 changes: 2 additions & 90 deletions arch/sh/include/asm/hw_irq.h
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
#define __ASM_SH_HW_IRQ_H

#include <linux/init.h>
#include <linux/sh_intc.h>
#include <asm/atomic.h>

extern atomic_t irq_err_count;
Expand All @@ -23,101 +24,12 @@ struct ipr_desc {

void register_ipr_controller(struct ipr_desc *);

typedef unsigned char intc_enum;

struct intc_vect {
intc_enum enum_id;
unsigned short vect;
};

#define INTC_VECT(enum_id, vect) { enum_id, vect }
#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))

struct intc_group {
intc_enum enum_id;
intc_enum enum_ids[32];
};

#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }

struct intc_mask_reg {
unsigned long set_reg, clr_reg, reg_width;
intc_enum enum_ids[32];
#ifdef CONFIG_SMP
unsigned long smp;
#endif
};

struct intc_prio_reg {
unsigned long set_reg, clr_reg, reg_width, field_width;
intc_enum enum_ids[16];
#ifdef CONFIG_SMP
unsigned long smp;
#endif
};

struct intc_sense_reg {
unsigned long reg, reg_width, field_width;
intc_enum enum_ids[16];
};

#ifdef CONFIG_SMP
#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
#else
#define INTC_SMP(stride, nr)
#endif

struct intc_desc {
struct intc_vect *vectors;
unsigned int nr_vectors;
struct intc_group *groups;
unsigned int nr_groups;
struct intc_mask_reg *mask_regs;
unsigned int nr_mask_regs;
struct intc_prio_reg *prio_regs;
unsigned int nr_prio_regs;
struct intc_sense_reg *sense_regs;
unsigned int nr_sense_regs;
char *name;
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
struct intc_mask_reg *ack_regs;
unsigned int nr_ack_regs;
#endif
};

#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
mask_regs, prio_regs, sense_regs) \
struct intc_desc symbol __initdata = { \
_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
_INTC_ARRAY(sense_regs), \
chipname, \
}

#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
mask_regs, prio_regs, sense_regs, ack_regs) \
struct intc_desc symbol __initdata = { \
_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
_INTC_ARRAY(sense_regs), \
chipname, \
_INTC_ARRAY(ack_regs), \
}
#endif

void __init register_intc_controller(struct intc_desc *desc);
int intc_set_priority(unsigned int irq, unsigned int prio);

void __init plat_irq_setup(void);
#ifdef CONFIG_CPU_SH3
void __init plat_irq_setup_sh3(void);
#endif
void __init plat_irq_setup_pins(int mode);

enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
void __init plat_irq_setup_pins(int mode);

#endif /* __ASM_SH_HW_IRQ_H */
77 changes: 36 additions & 41 deletions arch/sh/include/asm/io.h
Original file line number Diff line number Diff line change
Expand Up @@ -101,44 +101,33 @@
#define outsw __outsw
#define outsl __outsl

#define __raw_readb(a) __readb((void __iomem *)(a))
#define __raw_readw(a) __readw((void __iomem *)(a))
#define __raw_readl(a) __readl((void __iomem *)(a))
#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))

void __raw_writesl(unsigned long addr, const void *data, int longlen);
void __raw_readsl(unsigned long addr, void *data, int longlen);
#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))

void __raw_writesl(void __iomem *addr, const void *data, int longlen);
void __raw_readsl(const void __iomem *addr, void *data, int longlen);

/*
* The platform header files may define some of these macros to use
* the inlined versions where appropriate. These macros may also be
* redefined by userlevel programs.
*/
#ifdef __readb
# define readb(a) ({ unsigned int r_ = __raw_readb(a); mb(); r_; })
#endif
#ifdef __raw_readw
# define readw(a) ({ unsigned int r_ = __raw_readw(a); mb(); r_; })
#endif
#ifdef __raw_readl
# define readl(a) ({ unsigned int r_ = __raw_readl(a); mb(); r_; })
#endif
#define readb(a) ({ unsigned int r_ = __readb(a); mb(); r_; })
#define readw(a) ({ unsigned int r_ = __readw(a); mb(); r_; })
#define readl(a) ({ unsigned int r_ = __readl(a); mb(); r_; })

#ifdef __raw_writeb
# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
#endif
#ifdef __raw_writew
# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
#endif
#ifdef __raw_writel
# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
#endif
#define writeb(v,a) ({ __writeb((v),(a)); mb(); })
#define writew(v,a) ({ __writew((v),(a)); mb(); })
#define writel(v,a) ({ __writel((v),(a)); mb(); })

#define __BUILD_MEMORY_STRING(bwlq, type) \
\
static inline void writes##bwlq(volatile void __iomem *mem, \
static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
const void *addr, unsigned int count) \
{ \
const volatile type *__addr = addr; \
Expand All @@ -149,8 +138,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
} \
} \
\
static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
unsigned int count) \
static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
void *addr, unsigned int count) \
{ \
volatile type *__addr = addr; \
\
Expand All @@ -162,33 +151,39 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \

__BUILD_MEMORY_STRING(b, u8)
__BUILD_MEMORY_STRING(w, u16)

#define writesb __raw_writesb
#define writesw __raw_writesw
#define writesl __raw_writesl

#define readsb __raw_readsb
#define readsw __raw_readsw
#define readsl __raw_readsl

#define readb_relaxed(a) readb(a)
#define readw_relaxed(a) readw(a)
#define readl_relaxed(a) readl(a)

/* Simple MMIO */
#define ioread8(a) readb(a)
#define ioread16(a) readw(a)
#define ioread8(a) __raw_readb(a)
#define ioread16(a) __raw_readw(a)
#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
#define ioread32(a) readl(a)
#define ioread32(a) __raw_readl(a)
#define ioread32be(a) be32_to_cpu(__raw_readl((a)))

#define iowrite8(v,a) writeb((v),(a))
#define iowrite16(v,a) writew((v),(a))
#define iowrite8(v,a) __raw_writeb((v),(a))
#define iowrite16(v,a) __raw_writew((v),(a))
#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
#define iowrite32(v,a) writel((v),(a))
#define iowrite32(v,a) __raw_writel((v),(a))
#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))

#define ioread8_rep(a, d, c) readsb((a), (d), (c))
#define ioread16_rep(a, d, c) readsw((a), (d), (c))
#define ioread32_rep(a, d, c) readsl((a), (d), (c))
#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))

#define iowrite8_rep(a, s, c) writesb((a), (s), (c))
#define iowrite16_rep(a, s, c) writesw((a), (s), (c))
#define iowrite32_rep(a, s, c) writesl((a), (s), (c))
#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))

#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */

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2 changes: 1 addition & 1 deletion arch/sh/include/asm/migor.h
Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@

#define BSC_CS6ABCR 0xfec1001c

#include <asm/sh_mobile_lcdc.h>
#include <video/sh_mobile_lcdc.h>

int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
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2 changes: 0 additions & 2 deletions arch/sh/kernel/cpu/irq/Makefile
Original file line number Diff line number Diff line change
@@ -1,8 +1,6 @@
#
# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
#
obj-y += intc.o

obj-$(CONFIG_SUPERH32) += imask.o
obj-$(CONFIG_CPU_SH5) += intc-sh5.o
obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
4 changes: 2 additions & 2 deletions arch/sh/kernel/cpu/irq/ipr.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,15 +33,15 @@ static void disable_ipr_irq(unsigned int irq)
struct ipr_data *p = get_irq_chip_data(irq);
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
/* Set the priority in IPR to 0 */
ctrl_outw(ctrl_inw(addr) & (0xffff ^ (0xf << p->shift)), addr);
__raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
}

static void enable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
/* Set priority in IPR back to original value */
ctrl_outw(ctrl_inw(addr) | (p->priority << p->shift), addr);
__raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
}

/*
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8 changes: 4 additions & 4 deletions arch/sh/lib/io.c
Original file line number Diff line number Diff line change
Expand Up @@ -14,12 +14,12 @@
#include <linux/module.h>
#include <linux/io.h>

void __raw_readsl(unsigned long addr, void *datap, int len)
void __raw_readsl(const void __iomem *addr, void *datap, int len)
{
u32 *data;

for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
*data++ = ctrl_inl(addr);
*data++ = __raw_readl(addr);

if (likely(len >= (0x20 >> 2))) {
int tmp2, tmp3, tmp4, tmp5, tmp6;
Expand Down Expand Up @@ -59,11 +59,11 @@ void __raw_readsl(unsigned long addr, void *datap, int len)
}

for (; len != 0; len--)
*data++ = ctrl_inl(addr);
*data++ = __raw_readl(addr);
}
EXPORT_SYMBOL(__raw_readsl);

void __raw_writesl(unsigned long addr, const void *data, int len)
void __raw_writesl(void __iomem *addr, const void *data, int len)
{
if (likely(len != 0)) {
int tmp1;
Expand Down
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