Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6: (42 commits)
  PCI: Change PCI subsystem MAINTAINER
  PCI: pci-iommu-iotlb-flushing-speedup
  PCI: pci_setup_bridge() mustn't be __devinit
  PCI: pci_bus_size_cardbus() mustn't be __devinit
  PCI: pci_scan_device() mustn't be __devinit
  PCI: pci_alloc_child_bus() mustn't be __devinit
  PCI: replace remaining __FUNCTION__ occurrences
  PCI: Hotplug: fakephp: Return success, not ENODEV, when bus rescan is triggered
  PCI: Hotplug: Fix leaks in IBM Hot Plug Controller Driver - ibmphp_init_devno()
  PCI: clean up resource alignment management
  PCI: aerdrv_acpi.c: remove unneeded NULL check
  PCI: Update VIA CX700 quirk
  PCI: Expose PCI VPD through sysfs
  PCI: iommu: iotlb flushing
  PCI: simplify quirk debug output
  PCI: iova RB tree setup tweak
  PCI: parisc: use generic pci_enable_resources()
  PCI: ppc: use generic pci_enable_resources()
  PCI: powerpc: use generic pci_enable_resources()
  PCI: ia64: use generic pci_enable_resources()
  ...

Documentation/00-INDEX

@@ -25,8 +25,6 @@ DMA-API.txt
 	- DMA API, pci_ API & extensions for non-consistent memory machines.
 DMA-ISA-LPC.txt
 	- How to do DMA with ISA (and LPC) devices.
-DMA-mapping.txt
-	- info for PCI drivers using DMA portably across all platforms.
 DocBook/
 	- directory with DocBook templates etc. for kernel documentation.
 HOWTO
@@ -43,8 +41,6 @@ ManagementStyle
 	- how to (attempt to) manage kernel hackers.
 MSI-HOWTO.txt
 	- the Message Signaled Interrupts (MSI) Driver Guide HOWTO and FAQ.
-PCIEBUS-HOWTO.txt
-	- a guide describing the PCI Express Port Bus driver.
 RCU/
 	- directory with info on RCU (read-copy update).
 README.DAC960
@@ -285,12 +281,6 @@ parport.txt
 	- how to use the parallel-port driver.
 parport-lowlevel.txt
 	- description and usage of the low level parallel port functions.
-pci-error-recovery.txt
-	- info on PCI error recovery.
-pci.txt
-	- info on the PCI subsystem for device driver authors.
-pcieaer-howto.txt
-	- the PCI Express Advanced Error Reporting Driver Guide HOWTO.
 pcmcia/
 	- info on the Linux PCMCIA driver.
 pi-futex.txt

Documentation/ABI/testing/sysfs-bus-pci

@@ -0,0 +1,11 @@
+What:		/sys/bus/pci/devices/.../vpd
+Date:		February 2008
+Contact:	Ben Hutchings <bhutchings@solarflare.com>
+Description:
+		A file named vpd in a device directory will be a
+		binary file containing the Vital Product Data for the
+		device.  It should follow the VPD format defined in
+		PCI Specification 2.1 or 2.2, but users should consider
+		that some devices may have malformatted data.  If the
+		underlying VPD has a writable section then the
+		corresponding section of this file will be writable.

Documentation/PCI/00-INDEX

@@ -0,0 +1,12 @@
+00-INDEX
+	- this file
+PCI-DMA-mapping.txt
+	- info for PCI drivers using DMA portably across all platforms
+PCIEBUS-HOWTO.txt
+	- a guide describing the PCI Express Port Bus driver
+pci-error-recovery.txt
+	- info on PCI error recovery
+pci.txt
+	- info on the PCI subsystem for device driver authors
+pcieaer-howto.txt
+	- the PCI Express Advanced Error Reporting Driver Guide HOWTO

Documentation/PCIEBUS-HOWTO.txt → Documentation/PCI/PCIEBUS-HOWTO.txt

@@ -56,9 +56,9 @@ advantages of using the PCI Express Port Bus driver are listed below:
 
 	- Allow service drivers implemented in an independent
 	  staged approach.
-	
+
 	- Allow one service driver to run on multiple PCI-PCI Bridge
-	  Port devices. 
+	  Port devices.
 
 	- Manage and distribute resources of a PCI-PCI Bridge Port
 	  device to requested service drivers.
@@ -82,7 +82,7 @@ Model requires some minimal changes on existing service drivers that
 imposes no impact on the functionality of existing service drivers.
 
 A service driver is required to use the two APIs shown below to
-register its service with the PCI Express Port Bus driver (see 
+register its service with the PCI Express Port Bus driver (see
 section 5.2.1 & 5.2.2). It is important that a service driver
 initializes the pcie_port_service_driver data structure, included in
 header file /include/linux/pcieport_if.h, before calling these APIs.
@@ -137,7 +137,7 @@ driver.
 static int __init aerdrv_service_init(void)
 {
 	int retval = 0;
-	
+
 	retval = pcie_port_service_register(&root_aerdrv);
 	if (!retval) {
 		/*
@@ -147,7 +147,7 @@ static int __init aerdrv_service_init(void)
 	return retval;
 }
 
-static void __exit aerdrv_service_exit(void) 
+static void __exit aerdrv_service_exit(void)
 {
 	pcie_port_service_unregister(&root_aerdrv);
 }
@@ -175,7 +175,7 @@ same physical Root Port. Both service drivers call pci_enable_msi to
 request MSI based interrupts. A service driver may not know whether
 any other service drivers have run on this Root Port. If either one
 of them calls pci_disable_msi, it puts the other service driver
-in a wrong interrupt mode. 
+in a wrong interrupt mode.
 
 To avoid this situation all service drivers are not permitted to
 switch interrupt mode on its device. The PCI Express Port Bus driver

Documentation/pci.txt → Documentation/PCI/pci.txt

@@ -119,7 +119,7 @@ initialization with a pointer to a structure describing the driver
 			the power state of a device before reboot.
 			e.g. drivers/net/e100.c.
 
-	err_handler	See Documentation/pci-error-recovery.txt
+	err_handler	See Documentation/PCI/pci-error-recovery.txt
 
 
 The ID table is an array of struct pci_device_id entries ending with an

Documentation/pcieaer-howto.txt → Documentation/PCI/pcieaer-howto.txt

@@ -13,7 +13,7 @@ Reporting (AER) driver and provides information on how to use it, as
 well as how to enable the drivers of endpoint devices to conform with
 PCI Express AER driver.
 
-1.2 Copyright © Intel Corporation 2006.
+1.2 Copyright © Intel Corporation 2006.
 
 1.3 What is the PCI Express AER Driver?
 

Documentation/kernel-parameters.txt

@@ -847,6 +847,10 @@ and is between 256 and 4096 characters. It is defined in the file
 			than 32 bit addressing. The default is to look
 			for translation below 32 bit and if not available
 			then look in the higher range.
+		strict [Default Off]
+			With this option on every unmap_single operation will
+			result in a hardware IOTLB flush operation as opposed
+			to batching them for performance.
 
 	io_delay=	[X86-32,X86-64] I/O delay method
 		0x80
@@ -1471,10 +1475,6 @@ and is between 256 and 4096 characters. It is defined in the file
 		nomsi		[MSI] If the PCI_MSI kernel config parameter is
 				enabled, this kernel boot option can be used to
 				disable the use of MSI interrupts system-wide.
-		nosort		[X86-32] Don't sort PCI devices according to
-				order given by the PCI BIOS. This sorting is
-				done to get a device order compatible with
-				older kernels.
 		biosirq		[X86-32] Use PCI BIOS calls to get the interrupt
 				routing table. These calls are known to be buggy
 				on several machines and they hang the machine

Documentation/memory-barriers.txt

@@ -430,8 +430,8 @@ There are certain things that the Linux kernel memory barriers do not guarantee:
 
 	[*] For information on bus mastering DMA and coherency please read:
 
-	    Documentation/pci.txt
-	    Documentation/DMA-mapping.txt
+	    Documentation/PCI/pci.txt
+	    Documentation/PCI/PCI-DMA-mapping.txt
 	    Documentation/DMA-API.txt
 
 

MAINTAINERS

@@ -3065,11 +3065,10 @@ L:	linux-pci@atrey.karlin.mff.cuni.cz
 S:	Supported
 
 PCI SUBSYSTEM
-P:	Greg Kroah-Hartman
-M:	gregkh@suse.de
+P:	Jesse Barnes
+M:	jbarnes@virtuousgeek.org
 L:	linux-kernel@vger.kernel.org
 L:	linux-pci@atrey.karlin.mff.cuni.cz
-T:	quilt kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/
 S:	Supported
 
 PCI HOTPLUG CORE

arch/alpha/kernel/pci.c

@@ -372,28 +372,7 @@ EXPORT_SYMBOL(pcibios_bus_to_resource);
 int
 pcibios_enable_device(struct pci_dev *dev, int mask)
 {
-	u16 cmd, oldcmd;
-	int i;
-
-	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-	oldcmd = cmd;
-
-	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
-		struct resource *res = &dev->resource[i];
-
-		if (res->flags & IORESOURCE_IO)
-			cmd |= PCI_COMMAND_IO;
-		else if (res->flags & IORESOURCE_MEM)
-			cmd |= PCI_COMMAND_MEMORY;
-	}
-
-	if (cmd != oldcmd) {
-		printk(KERN_DEBUG "PCI: Enabling device: (%s), cmd %x\n",
-		       pci_name(dev), cmd);
-		/* Enable the appropriate bits in the PCI command register.  */
-		pci_write_config_word(dev, PCI_COMMAND, cmd);
-	}
-	return 0;
+	return pci_enable_resources(dev, mask);
 }
 
 /*

arch/frv/mb93090-mb00/pci-frv.h

@@ -17,8 +17,6 @@
 #define PCI_PROBE_BIOS		0x0001
 #define PCI_PROBE_CONF1		0x0002
 #define PCI_PROBE_CONF2		0x0004
-#define PCI_NO_SORT		0x0100
-#define PCI_BIOS_SORT		0x0200
 #define PCI_NO_CHECKS		0x0400
 #define PCI_ASSIGN_ROMS		0x1000
 #define PCI_BIOS_IRQ_SCAN	0x2000

arch/frv/mb93090-mb00/pci-vdk.c

@@ -198,58 +198,6 @@ static struct pci_ops * __init pci_check_direct(void)
 	return NULL;
 }
 
-/*
- * Several buggy motherboards address only 16 devices and mirror
- * them to next 16 IDs. We try to detect this `feature' on all
- * primary buses (those containing host bridges as they are
- * expected to be unique) and remove the ghost devices.
- */
-
-static void __init pcibios_fixup_ghosts(struct pci_bus *b)
-{
-	struct list_head *ln, *mn;
-	struct pci_dev *d, *e;
-	int mirror = PCI_DEVFN(16,0);
-	int seen_host_bridge = 0;
-	int i;
-
-	for (ln=b->devices.next; ln != &b->devices; ln=ln->next) {
-		d = pci_dev_b(ln);
-		if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
-			seen_host_bridge++;
-		for (mn=ln->next; mn != &b->devices; mn=mn->next) {
-			e = pci_dev_b(mn);
-			if (e->devfn != d->devfn + mirror ||
-			    e->vendor != d->vendor ||
-			    e->device != d->device ||
-			    e->class != d->class)
-				continue;
-			for(i=0; i<PCI_NUM_RESOURCES; i++)
-				if (e->resource[i].start != d->resource[i].start ||
-				    e->resource[i].end != d->resource[i].end ||
-				    e->resource[i].flags != d->resource[i].flags)
-					continue;
-			break;
-		}
-		if (mn == &b->devices)
-			return;
-	}
-	if (!seen_host_bridge)
-		return;
-	printk("PCI: Ignoring ghost devices on bus %02x\n", b->number);
-
-	ln = &b->devices;
-	while (ln->next != &b->devices) {
-		d = pci_dev_b(ln->next);
-		if (d->devfn >= mirror) {
-			list_del(&d->global_list);
-			list_del(&d->bus_list);
-			kfree(d);
-		} else
-			ln = ln->next;
-	}
-}
-
 /*
  * Discover remaining PCI buses in case there are peer host bridges.
  * We use the number of last PCI bus provided by the PCI BIOS.
@@ -356,7 +304,6 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
 #if 0
 	printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number);
 #endif
-	pcibios_fixup_ghosts(bus);
 	pci_read_bridge_bases(bus);
 
 	if (bus->number == 0) {

arch/ia64/pci/pci.c

@@ -504,54 +504,12 @@ pcibios_update_irq (struct pci_dev *dev, int irq)
 	/* ??? FIXME -- record old value for shutdown.  */
 }
 
-static inline int
-pcibios_enable_resources (struct pci_dev *dev, int mask)
-{
-	u16 cmd, old_cmd;
-	int idx;
-	struct resource *r;
-	unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM;
-
-	if (!dev)
-		return -EINVAL;
-
-	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-	old_cmd = cmd;
-	for (idx=0; idx<PCI_NUM_RESOURCES; idx++) {
-		/* Only set up the desired resources.  */
-		if (!(mask & (1 << idx)))
-			continue;
-
-		r = &dev->resource[idx];
-		if (!(r->flags & type_mask))
-			continue;
-		if ((idx == PCI_ROM_RESOURCE) &&
-				(!(r->flags & IORESOURCE_ROM_ENABLE)))
-			continue;
-		if (!r->start && r->end) {
-			printk(KERN_ERR
-			       "PCI: Device %s not available because of resource collisions\n",
-			       pci_name(dev));
-			return -EINVAL;
-		}
-		if (r->flags & IORESOURCE_IO)
-			cmd |= PCI_COMMAND_IO;
-		if (r->flags & IORESOURCE_MEM)
-			cmd |= PCI_COMMAND_MEMORY;
-	}
-	if (cmd != old_cmd) {
-		printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
-		pci_write_config_word(dev, PCI_COMMAND, cmd);
-	}
-	return 0;
-}
-
 int
 pcibios_enable_device (struct pci_dev *dev, int mask)
 {
 	int ret;
 
-	ret = pcibios_enable_resources(dev, mask);
+	ret = pci_enable_resources(dev, mask);
 	if (ret < 0)
 		return ret;
 

arch/mn10300/unit-asb2305/pci-asb2305.h

@@ -23,8 +23,6 @@
 #define PCI_PROBE_BIOS 1
 #define PCI_PROBE_CONF1 2
 #define PCI_PROBE_CONF2 4
-#define PCI_NO_SORT 0x100
-#define PCI_BIOS_SORT 0x200
 #define PCI_NO_CHECKS 0x400
 #define PCI_ASSIGN_ROMS 0x1000
 #define PCI_BIOS_IRQ_SCAN 0x2000

arch/parisc/kernel/pci.c

@@ -287,23 +287,15 @@ void pcibios_align_resource(void *data, struct resource *res,
  */
 int pcibios_enable_device(struct pci_dev *dev, int mask)
 {
-	u16 cmd;
-	int idx;
+	int err;
+	u16 cmd, old_cmd;
 
-	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-
-	for (idx = 0; idx < DEVICE_COUNT_RESOURCE; idx++) {
-		struct resource *r = &dev->resource[idx];
+	err = pci_enable_resources(dev, mask);
+	if (err < 0)
+		return err;
 
-		/* only setup requested resources */
-		if (!(mask & (1<<idx)))
-			continue;
-
-		if (r->flags & IORESOURCE_IO)
-			cmd |= PCI_COMMAND_IO;
-		if (r->flags & IORESOURCE_MEM)
-			cmd |= PCI_COMMAND_MEMORY;
-	}
+	pci_read_config_word(dev, PCI_COMMAND, &cmd);
+	old_cmd = cmd;
 
 	cmd |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
 
@@ -312,8 +304,12 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
 	if (dev->bus->bridge_ctl & PCI_BRIDGE_CTL_FAST_BACK)
 		cmd |= PCI_COMMAND_FAST_BACK;
 #endif
-	DBGC("PCIBIOS: Enabling device %s cmd 0x%04x\n", pci_name(dev), cmd);
-	pci_write_config_word(dev, PCI_COMMAND, cmd);
+
+	if (cmd != old_cmd) {
+		dev_info(&dev->dev, "enabling SERR and PARITY (%04x -> %04x)\n",
+			old_cmd, cmd);
+		pci_write_config_word(dev, PCI_COMMAND, cmd);
+	}
 	return 0;
 }