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yaml
---
r: 287655
b: refs/heads/master
c: 4903062
h: refs/heads/master
i:
  287653: e975dba
  287651: 19c0235
  287647: aa22db5
v: v3
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Linus Torvalds committed Feb 17, 2012
1 parent f69ca3d commit bdab093
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Showing 4 changed files with 17 additions and 23 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: b3b0870ef3ffed72b92415423da864f440f57ad6
refs/heads/master: 4903062b5485f0e2c286a23b44c9b59d9b017d53
19 changes: 0 additions & 19 deletions trunk/arch/x86/include/asm/i387.h
Original file line number Diff line number Diff line change
Expand Up @@ -211,15 +211,6 @@ static inline void fpu_fxsave(struct fpu *fpu)

#endif /* CONFIG_X86_64 */

/* We need a safe address that is cheap to find and that is already
in L1 during context switch. The best choices are unfortunately
different for UP and SMP */
#ifdef CONFIG_SMP
#define safe_address (__per_cpu_offset[0])
#else
#define safe_address (__get_cpu_var(kernel_cpustat).cpustat[CPUTIME_USER])
#endif

/*
* These must be called with preempt disabled
*/
Expand All @@ -243,16 +234,6 @@ static inline void fpu_save_init(struct fpu *fpu)

if (unlikely(fpu->state->fxsave.swd & X87_FSW_ES))
asm volatile("fnclex");

/* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
is pending. Clear the x87 state here by setting it to fixed
values. safe_address is a random variable that should be in L1 */
alternative_input(
ASM_NOP8 ASM_NOP2,
"emms\n\t" /* clear stack tags */
"fildl %P[addr]", /* set F?P to defined value */
X86_FEATURE_FXSAVE_LEAK,
[addr] "m" (safe_address));
}

static inline void __save_init_fpu(struct task_struct *tsk)
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5 changes: 2 additions & 3 deletions trunk/arch/x86/kernel/process_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -387,6 +387,8 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
struct tss_struct *tss = &per_cpu(init_tss, cpu);
unsigned fsindex, gsindex;

__unlazy_fpu(prev_p);

/*
* Reload esp0, LDT and the page table pointer:
*/
Expand Down Expand Up @@ -415,9 +417,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)

load_TLS(next, cpu);

/* Must be after DS reload */
__unlazy_fpu(prev_p);

/*
* Leave lazy mode, flushing any hypercalls made here.
* This must be done before restoring TLS segments so
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14 changes: 14 additions & 0 deletions trunk/arch/x86/kernel/traps.c
Original file line number Diff line number Diff line change
Expand Up @@ -585,6 +585,10 @@ void math_state_restore(void)
struct thread_info *thread = current_thread_info();
struct task_struct *tsk = thread->task;

/* We need a safe address that is cheap to find and that is already
in L1. We just brought in "thread->task", so use that */
#define safe_address (thread->task)

if (!tsk_used_math(tsk)) {
local_irq_enable();
/*
Expand All @@ -602,6 +606,16 @@ void math_state_restore(void)

__thread_fpu_begin(thread);

/* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
is pending. Clear the x87 state here by setting it to fixed
values. safe_address is a random variable that should be in L1 */
alternative_input(
ASM_NOP8 ASM_NOP2,
"emms\n\t" /* clear stack tags */
"fildl %P[addr]", /* set F?P to defined value */
X86_FEATURE_FXSAVE_LEAK,
[addr] "m" (safe_address));

/*
* Paranoid restore. send a SIGSEGV if we fail to restore the state.
*/
Expand Down

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