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Blackfin arch: base SIC_IWR# programming on whether the MMR exists
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base SIC_IWR# programming on whether the MMR exists
rather than having to maintain another list of processors

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Mike Frysinger authored and Bryan Wu committed Feb 4, 2009
1 parent ed1fb60 commit be1d854
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Showing 2 changed files with 8 additions and 14 deletions.
11 changes: 4 additions & 7 deletions arch/blackfin/mach-common/ints-priority.c
Original file line number Diff line number Diff line change
Expand Up @@ -1101,10 +1101,9 @@ int __init init_arch_irq(void)
IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;

#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \
|| defined(BF538_FAMILY) || defined(CONFIG_BF51x)
#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
# ifdef SIC_IWR1
/* BF52x/BF51x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
Expand All @@ -1114,10 +1113,8 @@ int __init init_arch_irq(void)
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#endif
# ifdef CONFIG_BF54x
# endif
# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
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11 changes: 4 additions & 7 deletions arch/blackfin/mach-common/pm.c
Original file line number Diff line number Diff line change
Expand Up @@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void)

bfin_pm_standby_restore();

#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \
defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
#ifdef SIC_IWR0
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
# ifdef SIC_IWR1
/* BF52x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
Expand All @@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void)
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#endif
# ifdef CONFIG_BF54x
# endif
# ifdef SIC_IWR2
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
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