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Merge branch 'next/topic-cpuid-rev' into next/topic-add-exynos4212
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Kukjin Kim committed Sep 16, 2011
2 parents d03c359 + b02b5da commit be6bb8c
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Showing 13 changed files with 220 additions and 60 deletions.
28 changes: 23 additions & 5 deletions arch/arm/mach-exynos4/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -43,11 +43,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_SYSRAM,
.pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_CMU,
.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
Expand Down Expand Up @@ -121,6 +116,24 @@ static struct map_desc exynos4_iodesc[] __initdata = {
},
};

static struct map_desc exynos4_iodesc0[] __initdata = {
{
.virtual = (unsigned long)S5P_VA_SYSRAM,
.pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
.length = SZ_4K,
.type = MT_DEVICE,
},
};

static struct map_desc exynos4_iodesc1[] __initdata = {
{
.virtual = (unsigned long)S5P_VA_SYSRAM,
.pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
.length = SZ_4K,
.type = MT_DEVICE,
},
};

static void exynos4_idle(void)
{
if (!need_resched())
Expand All @@ -143,6 +156,11 @@ void __init exynos4_map_io(void)
{
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));

if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
else
iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));

/* initialize device information early */
exynos4_default_sdhci0();
exynos4_default_sdhci1();
Expand Down
3 changes: 2 additions & 1 deletion arch/arm/mach-exynos4/include/mach/map.h
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,8 @@

#include <plat/map-s5p.h>

#define EXYNOS4_PA_SYSRAM 0x02020000
#define EXYNOS4_PA_SYSRAM0 0x02025000
#define EXYNOS4_PA_SYSRAM1 0x02020000

#define EXYNOS4_PA_FIMC0 0x11800000
#define EXYNOS4_PA_FIMC1 0x11810000
Expand Down
8 changes: 6 additions & 2 deletions arch/arm/mach-exynos4/platsmp.c
Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,12 @@
#include <mach/regs-clock.h>
#include <mach/regs-pmu.h>

#include <plat/cpu.h>

extern void exynos4_secondary_startup(void);

#define CPU1_BOOT_REG S5P_VA_SYSRAM
#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
S5P_INFORM5 : S5P_VA_SYSRAM)

/*
* control for which core is the next to come out of the secondary
Expand Down Expand Up @@ -218,5 +221,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);
__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
CPU1_BOOT_REG);
}
22 changes: 7 additions & 15 deletions arch/arm/mach-s3c64xx/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -43,16 +43,16 @@ static const char name_s3c6410[] = "S3C6410";

static struct cpu_table cpu_ids[] __initdata = {
{
.idcode = 0x36400000,
.idmask = 0xfffff000,
.idcode = S3C6400_CPU_ID,
.idmask = S3C64XX_CPU_MASK,
.map_io = s3c6400_map_io,
.init_clocks = s3c6400_init_clocks,
.init_uarts = s3c6400_init_uarts,
.init = s3c6400_init,
.name = name_s3c6400,
}, {
.idcode = 0x36410100,
.idmask = 0xffffff00,
.idcode = S3C6410_CPU_ID,
.idmask = S3C64XX_CPU_MASK,
.map_io = s3c6410_map_io,
.init_clocks = s3c6410_init_clocks,
.init_uarts = s3c6410_init_uarts,
Expand Down Expand Up @@ -140,22 +140,14 @@ void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)

void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
{
unsigned long idcode;

/* initialise the io descriptors we need for initialisation */
iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
iotable_init(mach_desc, size);

idcode = __raw_readl(S3C_VA_SYS + 0x118);
if (!idcode) {
/* S3C6400 has the ID register in a different place,
* and needs a write before it can be read. */

__raw_writel(0x0, S3C_VA_SYS + 0xA1C);
idcode = __raw_readl(S3C_VA_SYS + 0xA1C);
}
/* detect cpu id */
s3c64xx_init_cpu();

s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
}

static __init int s3c64xx_sysdev_init(void)
Expand Down
8 changes: 3 additions & 5 deletions arch/arm/mach-s5p64x0/dev-spi.c
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@
#include <mach/regs-clock.h>
#include <mach/spi-clocks.h>

#include <plat/cpu.h>
#include <plat/s3c64xx-spi.h>
#include <plat/gpio-cfg.h>

Expand Down Expand Up @@ -185,11 +186,8 @@ struct platform_device s5p64x0_device_spi1 = {

void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
{
unsigned int id;
struct s3c64xx_spi_info *pd;

id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;

/* Reject invalid configuration */
if (!num_cs || src_clk_nr < 0
|| src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
Expand All @@ -199,15 +197,15 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)

switch (cntrlr) {
case 0:
if (id == 0x50000)
if (soc_is_s5p6450())
pd = &s5p6450_spi0_pdata;
else
pd = &s5p6440_spi0_pdata;

s5p64x0_device_spi0.dev.platform_data = pd;
break;
case 1:
if (id == 0x50000)
if (soc_is_s5p6450())
pd = &s5p6450_spi1_pdata;
else
pd = &s5p6440_spi1_pdata;
Expand Down
7 changes: 2 additions & 5 deletions arch/arm/mach-s5p64x0/dma.c
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@
#include <mach/irqs.h>
#include <mach/regs-clock.h>

#include <plat/cpu.h>
#include <plat/devs.h>
#include <plat/s3c-pl330-pdata.h>

Expand Down Expand Up @@ -133,11 +134,7 @@ static struct platform_device s5p64x0_device_pdma = {

static int __init s5p64x0_dma_init(void)
{
unsigned int id;

id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;

if (id == 0x50000)
if (soc_is_s5p6450())
s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
else
s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
Expand Down
7 changes: 2 additions & 5 deletions arch/arm/mach-s5p64x0/gpiolib.c
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
#include <mach/regs-gpio.h>
#include <mach/regs-clock.h>

#include <plat/cpu.h>
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>
#include <plat/gpio-cfg-helpers.h>
Expand Down Expand Up @@ -473,14 +474,10 @@ static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,

static int __init s5p64x0_gpiolib_init(void)
{
unsigned int chipid;

chipid = __raw_readl(S5P64X0_SYS_ID);

s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs,
ARRAY_SIZE(s5p64x0_gpio_cfgs));

if ((chipid & 0xff000) == 0x50000) {
if (soc_is_s5p6450()) {
samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit,
ARRAY_SIZE(s5p6450_gpio_2bit));

Expand Down
3 changes: 2 additions & 1 deletion arch/arm/mach-s5p64x0/irq-eint.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@
#include <linux/irq.h>
#include <linux/io.h>

#include <plat/cpu.h>
#include <plat/regs-irqtype.h>
#include <plat/gpio-cfg.h>

Expand Down Expand Up @@ -67,7 +68,7 @@ static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
__raw_writel(ctrl, S5P64X0_EINT0CON0);

/* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
if (0x50000 == (__raw_readl(S5P64X0_SYS_ID) & 0xFF000))
if (soc_is_s5p6450())
s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
else
s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
Expand Down
9 changes: 4 additions & 5 deletions arch/arm/plat-s3c24xx/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -215,19 +215,18 @@ static void s3c24xx_pm_restart(char mode, const char *cmd)

void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
{
unsigned long idcode = 0x0;

/* initialise the io descriptors we need for initialisation */
iotable_init(mach_desc, size);
iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));

if (cpu_architecture() >= CPU_ARCH_ARMv5) {
idcode = s3c24xx_read_idcode_v5();
samsung_cpu_id = s3c24xx_read_idcode_v5();
} else {
idcode = s3c24xx_read_idcode_v4();
samsung_cpu_id = s3c24xx_read_idcode_v4();
}
s3c24xx_init_cpu();

arm_pm_restart = s3c24xx_pm_restart;

s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
}
28 changes: 14 additions & 14 deletions arch/arm/plat-s5p/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -36,40 +36,40 @@ static const char name_exynos4210[] = "EXYNOS4210";

static struct cpu_table cpu_ids[] __initdata = {
{
.idcode = 0x56440100,
.idmask = 0xfffff000,
.idcode = S5P6440_CPU_ID,
.idmask = S5P64XX_CPU_MASK,
.map_io = s5p6440_map_io,
.init_clocks = s5p6440_init_clocks,
.init_uarts = s5p6440_init_uarts,
.init = s5p64x0_init,
.name = name_s5p6440,
}, {
.idcode = 0x36450000,
.idmask = 0xfffff000,
.idcode = S5P6450_CPU_ID,
.idmask = S5P64XX_CPU_MASK,
.map_io = s5p6450_map_io,
.init_clocks = s5p6450_init_clocks,
.init_uarts = s5p6450_init_uarts,
.init = s5p64x0_init,
.name = name_s5p6450,
}, {
.idcode = 0x43100000,
.idmask = 0xfffff000,
.idcode = S5PC100_CPU_ID,
.idmask = S5PC100_CPU_MASK,
.map_io = s5pc100_map_io,
.init_clocks = s5pc100_init_clocks,
.init_uarts = s5pc100_init_uarts,
.init = s5pc100_init,
.name = name_s5pc100,
}, {
.idcode = 0x43110000,
.idmask = 0xfffff000,
.idcode = S5PV210_CPU_ID,
.idmask = S5PV210_CPU_MASK,
.map_io = s5pv210_map_io,
.init_clocks = s5pv210_init_clocks,
.init_uarts = s5pv210_init_uarts,
.init = s5pv210_init,
.name = name_s5pv210,
}, {
.idcode = 0x43210000,
.idmask = 0xfffe0000,
.idcode = EXYNOS4210_CPU_ID,
.idmask = EXYNOS4_CPU_MASK,
.map_io = exynos4_map_io,
.init_clocks = exynos4_init_clocks,
.init_uarts = exynos4_init_uarts,
Expand Down Expand Up @@ -114,13 +114,13 @@ static struct map_desc s5p_iodesc[] __initdata = {
void __init s5p_init_io(struct map_desc *mach_desc,
int size, void __iomem *cpuid_addr)
{
unsigned long idcode;

/* initialize the io descriptors we need for initialization */
iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
if (mach_desc)
iotable_init(mach_desc, size);

idcode = __raw_readl(cpuid_addr);
s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
/* detect cpu id and rev. */
s5p_init_cpu(cpuid_addr);

s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
}
2 changes: 1 addition & 1 deletion arch/arm/plat-samsung/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ obj- :=

# Objects we always build independent of SoC choice

obj-y += init.o
obj-y += init.o cpu.o
obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o
obj-y += clock.o
obj-y += pwm-clock.o
Expand Down
58 changes: 58 additions & 0 deletions arch/arm/plat-samsung/cpu.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,58 @@
/* linux/arch/arm/plat-samsung/cpu.c
*
* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Samsung CPU Support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>

#include <asm/system.h>

#include <mach/map.h>
#include <plat/cpu.h>

unsigned long samsung_cpu_id;
static unsigned int samsung_cpu_rev;

unsigned int samsung_rev(void)
{
return samsung_cpu_rev;
}
EXPORT_SYMBOL(samsung_rev);

void __init s3c24xx_init_cpu(void)
{
/* nothing here yet */

samsung_cpu_rev = 0;
}

void __init s3c64xx_init_cpu(void)
{
samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0x118);
if (!samsung_cpu_id) {
/*
* S3C6400 has the ID register in a different place,
* and needs a write before it can be read.
*/
__raw_writel(0x0, S3C_VA_SYS + 0xA1C);
samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0xA1C);
}

samsung_cpu_rev = 0;
}

void __init s5p_init_cpu(void __iomem *cpuid_addr)
{
samsung_cpu_id = __raw_readl(cpuid_addr);
samsung_cpu_rev = samsung_cpu_id & 0xFF;
}
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