---

yaml
---
r: 186564
b: refs/heads/master
c: 8c6356e
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1769fd86e13eadeca64881fb8494a17afeccbbbf
+refs/heads/master: 8c6356e2a57044614799de3f1e7f40561724893a

trunk/drivers/staging/dt3155/dt3155.h

@@ -1,7 +1,7 @@
 /*
 
 Copyright 1996,2002,2005 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
-                         Jason Lapenta, Scott Smedley
+			 Jason Lapenta, Scott Smedley
 
 This file is part of the DT3155 Device Driver.
 
@@ -20,8 +20,6 @@ along with the DT3155 Device Driver; if not, write to the Free
 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 MA 02111-1307 USA
 
-  $Id: dt3155.h,v 1.11 2005/08/09 06:08:51 ssmedley Exp $
-
 -- Changes --
 
   Date     Programmer  Description of changes made
@@ -56,120 +54,118 @@ MA 02111-1307 USA
 /* Can be 1 or 2 */
 #define MAXBOARDS 1
 
-#define BOARD_MAX_BUFFS 3
-#define MAXBUFFERS BOARD_MAX_BUFFS*MAXBOARDS
+#define BOARD_MAX_BUFFS	3
+#define MAXBUFFERS	(BOARD_MAX_BUFFS*MAXBOARDS)
 
-#define PCI_PAGE_SIZE (1 << 12)
+#define PCI_PAGE_SIZE	(1 << 12)
 
 #ifdef CCIR
-#define DT3155_MAX_ROWS 576
-#define DT3155_MAX_COLS 768
-#define FORMAT50HZ TRUE
+#define DT3155_MAX_ROWS	576
+#define DT3155_MAX_COLS	768
+#define FORMAT50HZ	TRUE
 #else
-#define DT3155_MAX_ROWS 480
-#define DT3155_MAX_COLS 640
-#define FORMAT50HZ FALSE
+#define DT3155_MAX_ROWS	480
+#define DT3155_MAX_COLS	640
+#define FORMAT50HZ	FALSE
 #endif
 
 /* Configuration structure */
 struct dt3155_config_s {
-  u_int acq_mode;
-  u_int cols, rows;
-  u_int continuous;
+	u_int acq_mode;
+	u_int cols, rows;
+	u_int continuous;
 };
 
 
 /* hold data for each frame */
-typedef struct
-{
-  u_long addr;          /* address of the buffer with the frame */
-  u_long tag;           /* unique number for the frame */
-  struct timeval time;  /* time that capture took place */
+typedef struct {
+	u_long addr;		/* address of the buffer with the frame */
+	u_long tag;		/* unique number for the frame */
+	struct timeval time;	/* time that capture took place */
 } frame_info_t;
 
-/* Structure for interrupt and buffer handling.  */
-/* This is the setup for 1 card                  */
+/*
+ * Structure for interrupt and buffer handling.
+ * This is the setup for 1 card
+ */
 struct dt3155_fbuffer_s {
-  int    nbuffers;
-
-  frame_info_t frame_info[ BOARD_MAX_BUFFS ];
+	int    nbuffers;
 
-  int empty_buffers[ BOARD_MAX_BUFFS ];    /* indexes empty frames */
-  int empty_len;                /* Number of empty buffers  */
-                                /* Zero means empty */
+	frame_info_t frame_info[BOARD_MAX_BUFFS];
 
-  int active_buf;               /* Where data is currently dma'ing */
-  int locked_buf;               /* Buffers used by user */
+	int empty_buffers[BOARD_MAX_BUFFS];	/* indexes empty frames */
+	int empty_len;				/* Number of empty buffers */
+						/* Zero means empty */
 
-  int ready_que[ BOARD_MAX_BUFFS ];
-  u_long ready_head;  /* The most recent buffer located here */
-  u_long ready_len;   /* The number of ready buffers */
+	int active_buf;			/* Where data is currently dma'ing */
+	int locked_buf;			/* Buffers used by user */
 
-  int even_happened;
-  int even_stopped;
+	int ready_que[BOARD_MAX_BUFFS];
+	u_long ready_head;	/* The most recent buffer located here */
+	u_long ready_len;	/* The number of ready buffers */
 
-  int stop_acquire;             /* Flag to stop interrupts */
-  u_long frame_count;           /* Counter for frames acquired by this card */
+	int even_happened;
+	int even_stopped;
 
+	int stop_acquire;	/* Flag to stop interrupts */
+	u_long frame_count;	/* Counter for frames acquired by this card */
 };
 
 
 
-#define DT3155_MODE_FRAME 1
-#define DT3155_MODE_FIELD 2
+#define DT3155_MODE_FRAME	1
+#define DT3155_MODE_FIELD	2
 
-#define DT3155_SNAP 1
-#define DT3155_ACQ  2
+#define DT3155_SNAP		1
+#define DT3155_ACQ		2
 
 /* There is one status structure for each card. */
-typedef struct dt3155_status_s
-{
-  int fixed_mode;              /* if 1, we are in fixed frame mode */
-  u_long reg_addr;             /* Register address for a single card */
-  u_long mem_addr;             /* Buffer start addr for this card */
-  u_long mem_size;             /* This is the amount of mem available  */
-  u_int  irq;                  /* this card's irq */
-  struct dt3155_config_s config;  /* configuration struct */
-  struct dt3155_fbuffer_s fbuffer;/* frame buffer state struct */
-  u_long state;                /* this card's state */
-  u_int device_installed;      /* Flag if installed. 1=installed */
+typedef struct dt3155_status_s {
+	int fixed_mode;		/* if 1, we are in fixed frame mode */
+	u_long reg_addr;	/* Register address for a single card */
+	u_long mem_addr;	/* Buffer start addr for this card */
+	u_long mem_size;	/* This is the amount of mem available  */
+	u_int irq;		/* this card's irq */
+	struct dt3155_config_s config;		/* configuration struct */
+	struct dt3155_fbuffer_s fbuffer;	/* frame buffer state struct */
+	u_long state;		/* this card's state */
+	u_int device_installed;	/* Flag if installed. 1=installed */
 } dt3155_status_t;
 
 /* Reference to global status structure */
 extern struct dt3155_status_s dt3155_status[MAXBOARDS];
 
-#define DT3155_STATE_IDLE    0x00
-#define DT3155_STATE_FRAME   0x01
-#define DT3155_STATE_FLD     0x02
-#define DT3155_STATE_STOP   0x100
-#define DT3155_STATE_ERROR  0x200
-#define DT3155_STATE_MODE   0x0ff
+#define DT3155_STATE_IDLE	0x00
+#define DT3155_STATE_FRAME	0x01
+#define DT3155_STATE_FLD	0x02
+#define DT3155_STATE_STOP	0x100
+#define DT3155_STATE_ERROR	0x200
+#define DT3155_STATE_MODE	0x0ff
 
-#define DT3155_IOC_MAGIC     '!'
+#define DT3155_IOC_MAGIC	'!'
 
-#define DT3155_SET_CONFIG  _IOW( DT3155_IOC_MAGIC, 1, struct dt3155_config_s )
-#define DT3155_GET_CONFIG  _IOR( DT3155_IOC_MAGIC, 2, struct dt3155_status_s )
-#define DT3155_STOP        _IO(  DT3155_IOC_MAGIC, 3 )
-#define DT3155_START       _IO(  DT3155_IOC_MAGIC, 4 )
-#define DT3155_FLUSH       _IO(  DT3155_IOC_MAGIC, 5 )
-#define DT3155_IOC_MAXNR   5
+#define DT3155_SET_CONFIG	_IOW(DT3155_IOC_MAGIC, 1, struct dt3155_config_s)
+#define DT3155_GET_CONFIG	_IOR(DT3155_IOC_MAGIC, 2, struct dt3155_status_s)
+#define DT3155_STOP		_IO(DT3155_IOC_MAGIC, 3)
+#define DT3155_START		_IO(DT3155_IOC_MAGIC, 4)
+#define DT3155_FLUSH		_IO(DT3155_IOC_MAGIC, 5)
+#define DT3155_IOC_MAXNR	5
 
 /* Error codes */
 
-#define DT_ERR_NO_BUFFERS   0x10000 /* not used but it might be one day - SS */
-#define DT_ERR_CORRUPT      0x20000
-#define DT_ERR_OVERRUN      0x30000
-#define DT_ERR_I2C_TIMEOUT  0x40000
-#define DT_ERR_MASK         0xff0000/* not used but it might be one day - SS */
+#define DT_ERR_NO_BUFFERS	0x10000	/* not used but it might be one day */
+#define DT_ERR_CORRUPT		0x20000
+#define DT_ERR_OVERRUN		0x30000
+#define DT_ERR_I2C_TIMEOUT	0x40000
+#define DT_ERR_MASK		0xff0000/* not used but it might be one day */
 
 /* User code will probably want to declare one of these for each card */
-typedef struct dt3155_read_s
-{
-  u_long offset;
-  u_long frame_seq;
-  u_long state;
+typedef struct dt3155_read_s {
+	u_long offset;
+	u_long frame_seq;
+	u_long state;
 
-  frame_info_t frame_info;
+	frame_info_t frame_info;
 } dt3155_read_t;
 
 #endif /* _DT3155_inc */

trunk/drivers/staging/dt3155/dt3155_drv.h

@@ -1,7 +1,7 @@
 /*
 
 Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
-                    Scott Smedley
+		    Scott Smedley
 
 This file is part of the DT3155 Device Driver.
 
@@ -25,7 +25,7 @@ MA 02111-1307 USA
 #define DT3155_DRV_INC
 
 /* kernel logical address of the frame grabbers */
-extern u_char *dt3155_lbase[ MAXBOARDS ];
+extern u_char *dt3155_lbase[MAXBOARDS];
 
 /* kernel logical address of ram buffer */
 extern u_char *dt3155_bbase;
@@ -35,7 +35,7 @@ extern u_char *dt3155_bbase;
 
 #include <linux/version.h>	/* need access to LINUX_VERSION_CODE */
 /* wait queue for reads */
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,1)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 3, 1)
 extern wait_queue_head_t dt3155_read_wait_queue[MAXBOARDS];
 #else
 extern struct wait_queue *dt3155_read_wait_queue[MAXBOARDS];

trunk/drivers/staging/dt3155/dt3155_io.h

@@ -1,7 +1,7 @@
 /*
 
 Copyright 1996,2002 Gregory D. Hager, Alfred A. Rizzi, Noah J. Cowan,
-                    Jason Lapenta, Scott Smedley
+		    Jason Lapenta, Scott Smedley
 
 This file is part of the DT3155 Device Driver.
 
@@ -36,8 +36,8 @@ MA 02111-1307 USA
 
 /* macros to access registers */
 
-#define   WriteMReg(Address, Data)        * ((u_long *) (Address)) = Data
-#define   ReadMReg(Address, Data)         Data = * ((u_long *) (Address))
+#define WriteMReg(Address, Data)	(*((u_long *)(Address)) = Data)
+#define ReadMReg(Address, Data)		(Data = *((u_long *)(Address)))
 
 /***************** 32 bit register globals  **************/
 
@@ -240,34 +240,33 @@ typedef union iic_csr2_tag {
  * dma_upper_lmt_tag
  */
 typedef union dma_upper_lmt_tag   {
-  u_long   reg;
-  struct
-  {
-    u_long   DMA_UPPER_LMT_VAL       :   24;
-    u_long                           :   8;
-  } fld;
+	u_long reg;
+	struct {
+		u_long DMA_UPPER_LMT_VAL:24;
+		u_long :8;
+	} fld;
 } DMA_UPPER_LMT_R;
 
 
 /***************************************
  * Global declarations of local copies
  * of boards' 32 bit registers
  ***************************************/
-extern u_long            even_dma_start_r;   /*  bit 0 should always be 0 */
-extern u_long            odd_dma_start_r;    /*               .. */
-extern u_long            even_dma_stride_r;  /*  bits 0&1 should always be 0 */
-extern u_long            odd_dma_stride_r;   /*               .. */
-extern u_long            even_pixel_fmt_r;
-extern u_long            odd_pixel_fmt_r;
+extern u_long even_dma_start_r;   /*  bit 0 should always be 0 */
+extern u_long odd_dma_start_r;    /*               .. */
+extern u_long even_dma_stride_r;  /*  bits 0&1 should always be 0 */
+extern u_long odd_dma_stride_r;   /*               .. */
+extern u_long even_pixel_fmt_r;
+extern u_long odd_pixel_fmt_r;
 
 extern FIFO_TRIGGER_R      fifo_trigger_r;
 extern XFER_MODE_R         xfer_mode_r;
 extern CSR1_R              csr1_r;
 extern RETRY_WAIT_CNT_R    retry_wait_cnt_r;
 extern INT_CSR_R           int_csr_r;
 
-extern u_long              even_fld_mask_r;
-extern u_long              odd_fld_mask_r;
+extern u_long even_fld_mask_r;
+extern u_long odd_fld_mask_r;
 
 extern MASK_LENGTH_R       mask_length_r;
 extern FIFO_FLAG_CNT_R     fifo_flag_cnt_r;
@@ -301,28 +300,26 @@ extern DMA_UPPER_LMT_R     odd_dma_upper_lmt_r;
 /******** Assignments and Typedefs for 8 bit I2C Registers********************/
 
 typedef union i2c_csr2_tag {
-  u_char   reg;
-  struct
-  {
-    u_char    CHROM_FIL         :   1;
-    u_char    SYNC_SNTL         :   1;
-    u_char    HZ50              :   1;
-    u_char    SYNC_PRESENT      :   1;
-    u_char    BUSY_EVE          :   1;
-    u_char    BUSY_ODD          :   1;
-    u_char    DISP_PASS         :   1;
-  } fld;
+	u_char reg;
+	struct {
+		u_char CHROM_FIL:1;
+		u_char SYNC_SNTL:1;
+		u_char HZ50:1;
+		u_char SYNC_PRESENT:1;
+		u_char BUSY_EVE:1;
+		u_char BUSY_ODD:1;
+		u_char DISP_PASS:1;
+	} fld;
 } I2C_CSR2;
 
 typedef union i2c_even_csr_tag {
-  u_char    reg;
-  struct
-  {
-    u_char    DONE_EVE       :   1;
-    u_char    SNGL_EVE       :   1;
-    u_char    ERROR_EVE      :   1;
-    u_char                   :   5;
-  } fld;
+	u_char    reg;
+	struct {
+		u_char DONE_EVE:1;
+		u_char SNGL_EVE:1;
+		u_char ERROR_EVE:1;
+		u_char :5;
+	} fld;
 } I2C_EVEN_CSR;
 
 typedef union i2c_odd_csr_tag {
@@ -394,7 +391,7 @@ extern u_char                 i2c_pm_lut_data;
 
 /* access 8-bit IIC registers */
 
-extern int ReadI2C (u_char * lpReg, u_short wIregIndex, u_char * byVal);
-extern int WriteI2C (u_char * lpReg, u_short wIregIndex, u_char byVal);
+extern int ReadI2C(u_char *lpReg, u_short wIregIndex, u_char *byVal);
+extern int WriteI2C(u_char *lpReg, u_short wIregIndex, u_char byVal);
 
 #endif