fully merge up to scsi-misc-2.6

git-mirror · Apr 19, 2005 · c0698f2 · c0698f2
2 parents cb62402 + 7f907d7
commit c0698f2
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Showing 44 changed files with 1,097 additions and 564 deletions.
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
@@ -168,12 +168,11 @@ void machine_restart(char * __unused)
 
 EXPORT_SYMBOL(machine_restart);
 
-void show_regs(struct pt_regs * regs)
+void __show_regs(struct pt_regs *regs)
 {
-	unsigned long flags;
-
-	flags = condition_codes(regs);
+	unsigned long flags = condition_codes(regs);
 
+	printk("CPU: %d\n", smp_processor_id());
 	print_symbol("PC is at %s\n", instruction_pointer(regs));
 	print_symbol("LR is at %s\n", regs->ARM_lr);
 	printk("pc : [<%08lx>]    lr : [<%08lx>]    %s\n"
@@ -213,6 +212,14 @@ void show_regs(struct pt_regs * regs)
 	}
 }
 
+void show_regs(struct pt_regs * regs)
+{
+	printk("\n");
+	printk("Pid: %d, comm: %20s\n", current->pid, current->comm);
+	__show_regs(regs);
+	__backtrace();
+}
+
 void show_fpregs(struct user_fp *regs)
 {
 	int i;

diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
@@ -31,9 +31,6 @@
 
 #include "ptrace.h"
 
-extern void c_backtrace (unsigned long fp, int pmode);
-extern void show_pte(struct mm_struct *mm, unsigned long addr);
-
 const char *processor_modes[]=
 { "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
   "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
@@ -216,8 +213,7 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err)
 
 	printk("Internal error: %s: %x [#%d]\n", str, err, ++die_counter);
 	print_modules();
-	printk("CPU: %d\n", smp_processor_id());
-	show_regs(regs);
+	__show_regs(regs);
 	printk("Process %s (pid: %d, stack limit = 0x%p)\n",
 		tsk->comm, tsk->pid, tsk->thread_info + 1);
 
@@ -482,7 +478,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
 		       current->pid, current->comm, no);
 		dump_instr(regs);
 		if (user_mode(regs)) {
-			show_regs(regs);
+			__show_regs(regs);
 			c_backtrace(regs->ARM_fp, processor_mode(regs));
 		}
 	}

diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h
@@ -0,0 +1,33 @@
+	.macro	bitop, instr
+	and	r2, r0, #7
+	mov	r3, #1
+	mov	r3, r3, lsl r2
+	save_and_disable_irqs ip, r2
+	ldrb	r2, [r1, r0, lsr #3]
+	\instr	r2, r2, r3
+	strb	r2, [r1, r0, lsr #3]
+	restore_irqs ip
+	mov	pc, lr
+	.endm
+
+/**
+ * testop - implement a test_and_xxx_bit operation.
+ * @instr: operational instruction
+ * @store: store instruction
+ *
+ * Note: we can trivially conditionalise the store instruction
+ * to avoid dirting the data cache.
+ */
+	.macro	testop, instr, store
+	add	r1, r1, r0, lsr #3
+	and	r3, r0, #7
+	mov	r0, #1
+	save_and_disable_irqs ip, r2
+	ldrb	r2, [r1]
+	tst	r2, r0, lsl r3
+	\instr	r2, r2, r0, lsl r3
+	\store	r2, [r1]
+	restore_irqs ip
+	moveq	r0, #0
+	mov	pc, lr
+	.endm
diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S
@@ -9,6 +9,7 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 /* Purpose  : Function to change a bit
@@ -17,12 +18,4 @@
 ENTRY(_change_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_change_bit_le)
-		and	r2, r0, #7
-		mov	r3, #1
-		mov	r3, r3, lsl r2
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1, r0, lsr #3]
-		eor	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		restore_irqs ip
-		RETINSTR(mov,pc,lr)
+	bitop	eor
diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S
@@ -9,6 +9,7 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 /*
@@ -18,14 +19,4 @@
 ENTRY(_clear_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_clear_bit_le)
-		and	r2, r0, #7
-		mov	r3, #1
-		mov	r3, r3, lsl r2
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1, r0, lsr #3]
-		bic	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		restore_irqs ip
-		RETINSTR(mov,pc,lr)
-
-
+	bitop	bic
diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S
@@ -9,6 +9,7 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
 		.text
 
 /*
@@ -18,12 +19,4 @@
 ENTRY(_set_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_set_bit_le)
-		and	r2, r0, #7
-		mov	r3, #1
-		mov	r3, r3, lsl r2
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1, r0, lsr #3]
-		orr	r2, r2, r3
-		strb	r2, [r1, r0, lsr #3]
-		restore_irqs ip
-		RETINSTR(mov,pc,lr)
+	bitop	orr
diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S
@@ -9,21 +9,10 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 ENTRY(_test_and_change_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_test_and_change_bit_le)
-		add	r1, r1, r0, lsr #3
-		and	r3, r0, #7
-		mov	r0, #1
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		eor	r2, r2, r0, lsl r3
-		strb	r2, [r1]
-		restore_irqs ip
-		moveq	r0, #0
-		RETINSTR(mov,pc,lr)
-
-
+	testop	eor, strb
diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S
@@ -9,21 +9,10 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 ENTRY(_test_and_clear_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_test_and_clear_bit_le)
-		add	r1, r1, r0, lsr #3	@ Get byte offset
-		and	r3, r0, #7		@ Get bit offset
-		mov	r0, #1
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		bic	r2, r2, r0, lsl r3
-		strb	r2, [r1]
-		restore_irqs ip
-		moveq	r0, #0
-		RETINSTR(mov,pc,lr)
-
-
+	testop	bicne, strneb
diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S
@@ -9,21 +9,10 @@
  */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
+#include "bitops.h"
                 .text
 
 ENTRY(_test_and_set_bit_be)
 		eor	r0, r0, #0x18		@ big endian byte ordering
 ENTRY(_test_and_set_bit_le)
-		add	r1, r1, r0, lsr #3	@ Get byte offset
-		and	r3, r0, #7		@ Get bit offset
-		mov	r0, #1
-		save_and_disable_irqs ip, r2
-		ldrb	r2, [r1]
-		tst	r2, r0, lsl r3
-		orr	r2, r2, r0, lsl r3
-		strb	r2, [r1]
-		restore_irqs ip
-		moveq	r0, #0
-		RETINSTR(mov,pc,lr)
-
-
+	testop	orreq, streqb
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c
@@ -51,15 +51,15 @@ static struct irqaction footbridge_timer_irq = {
  */
 static void __init footbridge_timer_init(void)
 {
-	isa_rtc_init();
-
 	timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
 
 	*CSR_TIMER1_CLR  = 0;
 	*CSR_TIMER1_LOAD = timer1_latch;
 	*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
 
 	setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
+
+	isa_rtc_init();
 }
 
 struct sys_timer footbridge_timer = {

diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
@@ -130,7 +130,7 @@ static int h3600_irda_set_power(struct device *dev, unsigned int state)
 	return 0;
 }
 
-static void h3600_irda_set_speed(struct device *dev, int speed)
+static void h3600_irda_set_speed(struct device *dev, unsigned int speed)
 {
 	if (speed < 4000000) {
 		clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL);

diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c
@@ -608,9 +608,11 @@ static int __init acpi_parse_fadt(unsigned long phys, unsigned long size)
 	acpi_fadt.sci_int = fadt->sci_int;
 #endif
 
+#ifdef CONFIG_ACPI_BUS
 	/* initialize rev and apic_phys_dest_mode for x86_64 genapic */
 	acpi_fadt.revision = fadt->revision;
 	acpi_fadt.force_apic_physical_destination_mode = fadt->force_apic_physical_destination_mode;
+#endif
 
 #ifdef CONFIG_X86_PM_TIMER
 	/* detect the location of the ACPI PM Timer */